{"id":"https://openalex.org/W2079769319","doi":"https://doi.org/10.1109/tc.1976.1674713","title":"On the Properties of Irredundant Logic Networks","display_name":"On the Properties of Irredundant Logic Networks","publication_year":1976,"publication_date":"1976-09-01","ids":{"openalex":"https://openalex.org/W2079769319","doi":"https://doi.org/10.1109/tc.1976.1674713","mag":"2079769319"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1976.1674713","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1976.1674713","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112047069","display_name":"Hayes","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Hayes","raw_affiliation_strings":["Department of Electrical Engineering and the Computer Science Program, University of Southern California"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and the Computer Science Program, University of Southern California","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5112047069"],"corresponding_institution_ids":["https://openalex.org/I1174212"],"apc_list":null,"apc_paid":null,"fwci":2.1965,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.88183161,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"C-25","issue":"9","first_page":"884","last_page":"892"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/subnetwork","display_name":"Subnetwork","score":0.9226336479187012},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.752600908279419},{"id":"https://openalex.org/keywords/conjecture","display_name":"Conjecture","score":0.6457676291465759},{"id":"https://openalex.org/keywords/bounded-function","display_name":"Bounded function","score":0.5602185726165771},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4699435830116272},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.45483866333961487},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4299507737159729},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.42547327280044556},{"id":"https://openalex.org/keywords/cascade","display_name":"Cascade","score":0.4226382076740265},{"id":"https://openalex.org/keywords/transformation","display_name":"Transformation (genetics)","score":0.41366544365882874},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.40859246253967285}],"concepts":[{"id":"https://openalex.org/C2780186347","wikidata":"https://www.wikidata.org/wiki/Q11414","display_name":"Subnetwork","level":2,"score":0.9226336479187012},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.752600908279419},{"id":"https://openalex.org/C2780990831","wikidata":"https://www.wikidata.org/wiki/Q319141","display_name":"Conjecture","level":2,"score":0.6457676291465759},{"id":"https://openalex.org/C34388435","wikidata":"https://www.wikidata.org/wiki/Q2267362","display_name":"Bounded function","level":2,"score":0.5602185726165771},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4699435830116272},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.45483866333961487},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4299507737159729},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.42547327280044556},{"id":"https://openalex.org/C34146451","wikidata":"https://www.wikidata.org/wiki/Q5048094","display_name":"Cascade","level":2,"score":0.4226382076740265},{"id":"https://openalex.org/C204241405","wikidata":"https://www.wikidata.org/wiki/Q461499","display_name":"Transformation (genetics)","level":3,"score":0.41366544365882874},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.40859246253967285},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C43617362","wikidata":"https://www.wikidata.org/wiki/Q170050","display_name":"Chromatography","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1976.1674713","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1976.1674713","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1570983058","https://openalex.org/W2038494392","https://openalex.org/W2051866164","https://openalex.org/W2067776562","https://openalex.org/W2075034526","https://openalex.org/W2083152404","https://openalex.org/W2131401312","https://openalex.org/W2140737090","https://openalex.org/W2153484041","https://openalex.org/W2535646108"],"related_works":["https://openalex.org/W3217230002","https://openalex.org/W3037217749","https://openalex.org/W2029981401","https://openalex.org/W2740334431","https://openalex.org/W4212808623","https://openalex.org/W4301344670","https://openalex.org/W3093722106","https://openalex.org/W2013467167","https://openalex.org/W1999551182","https://openalex.org/W2963699585"],"abstract_inverted_index":{"The":[0,171],"constraints":[1],"imposed":[2],"by":[3],"various":[4],"types":[5,39],"of":[6,11,24,35,40,53,73,88,94,141,157,173,176],"irredundancy":[7],"on":[8,31],"the":[9,21,32,86,145],"structure":[10],"combinational":[12],"logic":[13],"networks":[14,142],"are":[15,76,128],"investigated.":[16],"It":[17,98,115],"is":[18,45,96,99,116,120,133,160,178],"shown":[19,100],"that":[20,56,75,101,118,143],"usual":[22],"notion":[23],"irredundancy,":[25],"here":[26],"called":[27,46],"a-irredundancy,":[28],"places":[29],"bounds":[30],"maximum":[33],"number":[34,87],"inputs":[36],"to":[37,60,104,135],"certain":[38],"network":[41,44],"structures.":[42],"A":[43,153],"b-redundant":[47],"if":[48],"it":[49,132],"contains":[50],"a":[51,65,102],"cascade":[52,140],"single-input":[54],"gates":[55,89],"can":[57,110],"be":[58,111],"reduced":[59],"either":[61],"an":[62,137],"inverter":[63],"or":[64,151],"single":[66],"line.":[67],"Let":[68],"Nab(Z)":[69],"denote":[70],"all":[71],"realizations":[72,175],"Z":[74,177],"both":[77,164],"a-":[78,150,165],"and":[79,122,166],"b-irredundant.":[80],"If":[81],"N":[82,95],"\u2208":[83],"Nab(Z),":[84],"then":[85],"in":[90,113],"any":[91],"fan-out-free":[92],"subnetwork":[93],"bounded.":[97],"solution":[103],"some":[105,123],"important":[106],"design":[107],"optimization":[108],"problems":[109],"found":[112],"Nab(Z).":[114],"conjectured":[117],"N\u0101b(Z)":[119],"finite":[121],"results":[124],"supporting":[125],"this":[126],"conjecture":[127],"presented.":[129],"For":[130],"example,":[131],"impossible":[134],"construct":[136],"arbitrarily":[138],"long":[139],"perform":[144],"identity":[146],"transformation":[147],"without":[148],"introducing":[149],"b-redundancy.":[152],"more":[154],"general":[155],"type":[156],"redundancy,":[158],"c-redundancy,":[159],"defined":[161],"which":[162],"includes":[163],"b-redundancy":[167],"as":[168],"special":[169],"cases.":[170],"class":[172],"c-irredundant":[174],"finite.":[179]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}