{"id":"https://openalex.org/W2905112913","doi":"https://doi.org/10.1109/ssd.2018.8570405","title":"An Enhanced Variable Phase Accumulator with Minimal Hardware Complexity Dedicated to ADPLL Applications","display_name":"An Enhanced Variable Phase Accumulator with Minimal Hardware Complexity Dedicated to ADPLL Applications","publication_year":2018,"publication_date":"2018-03-01","ids":{"openalex":"https://openalex.org/W2905112913","doi":"https://doi.org/10.1109/ssd.2018.8570405","mag":"2905112913"},"language":"en","primary_location":{"id":"doi:10.1109/ssd.2018.8570405","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ssd.2018.8570405","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 15th International Multi-Conference on Systems, Signals & Devices (SSD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046601744","display_name":"Sehmi Saad","orcid":"https://orcid.org/0000-0003-2782-0570"},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]}],"countries":["TN"],"is_corresponding":true,"raw_author_name":"Sehmi Saad","raw_affiliation_strings":["LR-13ES12, University of Monastir, Tunisia"],"affiliations":[{"raw_affiliation_string":"LR-13ES12, University of Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079385501","display_name":"Mongia Mhiri","orcid":"https://orcid.org/0000-0002-8687-3966"},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]}],"countries":["TN"],"is_corresponding":false,"raw_author_name":"Mongia Mhiri","raw_affiliation_strings":["LR-13ES12, University of Monastir, Tunisia"],"affiliations":[{"raw_affiliation_string":"LR-13ES12, University of Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053935549","display_name":"Aymen Ben Hammadi","orcid":"https://orcid.org/0000-0002-0450-3137"},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]}],"countries":["TN"],"is_corresponding":false,"raw_author_name":"Aymen Ben Hammadi","raw_affiliation_strings":["LR-13ES12, University of Monastir, Tunisia"],"affiliations":[{"raw_affiliation_string":"LR-13ES12, University of Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042235811","display_name":"Kamel Besbes","orcid":"https://orcid.org/0000-0002-6868-0087"},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]}],"countries":["TN"],"is_corresponding":false,"raw_author_name":"Kamel Besbes","raw_affiliation_strings":["LR-13ES12, University of Monastir, Tunisia"],"affiliations":[{"raw_affiliation_string":"LR-13ES12, University of Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5046601744"],"corresponding_institution_ids":["https://openalex.org/I166928557"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.14102502,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"2","issue":null,"first_page":"1447","last_page":"1452"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/accumulator","display_name":"Accumulator (cryptography)","score":0.7287914752960205},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5682321190834045},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5167185664176941},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5025291442871094},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46083030104637146},{"id":"https://openalex.org/keywords/process-corners","display_name":"Process corners","score":0.460010290145874},{"id":"https://openalex.org/keywords/phase-frequency-detector","display_name":"Phase frequency detector","score":0.42550918459892273},{"id":"https://openalex.org/keywords/frequency-domain","display_name":"Frequency domain","score":0.4233313798904419},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.39986884593963623},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3648432195186615},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2428230345249176},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2226027548313141},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.2195149064064026},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14851835370063782},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.13874676823616028},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12281107902526855}],"concepts":[{"id":"https://openalex.org/C2078106","wikidata":"https://www.wikidata.org/wiki/Q14906620","display_name":"Accumulator (cryptography)","level":2,"score":0.7287914752960205},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5682321190834045},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5167185664176941},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5025291442871094},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46083030104637146},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.460010290145874},{"id":"https://openalex.org/C2776158855","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase frequency detector","level":5,"score":0.42550918459892273},{"id":"https://openalex.org/C19118579","wikidata":"https://www.wikidata.org/wiki/Q786423","display_name":"Frequency domain","level":2,"score":0.4233313798904419},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.39986884593963623},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3648432195186615},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2428230345249176},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2226027548313141},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.2195149064064026},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14851835370063782},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.13874676823616028},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12281107902526855},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ssd.2018.8570405","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ssd.2018.8570405","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 15th International Multi-Conference on Systems, Signals & Devices (SSD)","raw_type":"proceedings-article"},{"id":"mag:3176364010","is_oa":false,"landing_page_url":"https://jglobal.jst.go.jp/en/detail?JGLOBAL_ID=201902264573082926","pdf_url":null,"source":{"id":"https://openalex.org/S4306512817","display_name":"IEEE Conference Proceedings","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":"IEEE Conference Proceedings","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6000000238418579}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1512375387","https://openalex.org/W1544882865","https://openalex.org/W1998113239","https://openalex.org/W2016491712","https://openalex.org/W2064957623","https://openalex.org/W2113319198","https://openalex.org/W2114529226","https://openalex.org/W2131647018","https://openalex.org/W2152144298","https://openalex.org/W2154586278","https://openalex.org/W2163630970","https://openalex.org/W2164002677","https://openalex.org/W2166115090","https://openalex.org/W2168543008","https://openalex.org/W2569659361","https://openalex.org/W2598865672","https://openalex.org/W2743379479","https://openalex.org/W2744602616","https://openalex.org/W6683007717"],"related_works":["https://openalex.org/W4385624389","https://openalex.org/W4381745543","https://openalex.org/W2979324006","https://openalex.org/W2054263477","https://openalex.org/W2187168840","https://openalex.org/W2369807905","https://openalex.org/W2800123115","https://openalex.org/W2115565809","https://openalex.org/W2103790907","https://openalex.org/W2160947749"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,25,90,98,121,131],"high-speed":[4],"topology":[5,73],"for":[6],"phase":[7],"counter":[8,133],"in":[9,33,51,84,114,136],"an":[10],"All-digital":[11],"phase-locked":[12],"loop":[13],"(ADPLL)":[14],"architectures.":[15],"The":[16,36,71,109],"structure,":[17],"called":[18],"Variable":[19],"Phase":[20],"Accumulator":[21],"(VP":[22],"AC)":[23],"is":[24,44,102,112],"digital":[26],"block":[27],"running":[28],"at":[29],"the":[30,34,42,48,52,57,62,68,75,81,85,106,128],"highest":[31,86],"frequency":[32,54,64,87,140],"ADPLL.":[35],"high":[37],"operating":[38],"speed":[39],"feature":[40],"of":[41,124,130],"architecture":[43],"obtained":[45],"by":[46],"exploiting":[47],"count":[49,107],"output":[50],"reference":[53],"domain":[55,88],"while":[56],"circuit":[58,111],"needs":[59],"to":[60,89,104],"handle":[61],"radio":[63],"(RF)":[65],"signal":[66],"from":[67],"oscillator":[69],"output.":[70],"enhanced":[72],"decreases":[74],"timing":[76],"critical":[77],"path":[78],"and":[79],"minimizes":[80],"hardware":[82],"logic":[83,100],"shift":[91],"register":[92],"encoding":[93],"only":[94],"four":[95],"states.":[96],"Indeed,":[97],"simple":[99],"gate":[101],"used":[103],"slow":[105],"process.":[108],"proposed":[110],"demonstrated":[113],"90-nm":[115],"CMOS":[116],"process.,":[117],"which":[118],"allows":[119],"having":[120],"power":[122,129],"save":[123],"about":[125],"20":[126],"times":[127],"conventional":[132],"without":[134],"penalty":[135],"silicon":[137],"area":[138],"or":[139],"running.":[141]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}