{"id":"https://openalex.org/W4413095961","doi":"https://doi.org/10.1109/smacd65553.2025.11092103","title":"ATOMIC: Automatic Tool for Memristive IMPLY based Circuit-level Simulation and Validation","display_name":"ATOMIC: Automatic Tool for Memristive IMPLY based Circuit-level Simulation and Validation","publication_year":2025,"publication_date":"2025-07-07","ids":{"openalex":"https://openalex.org/W4413095961","doi":"https://doi.org/10.1109/smacd65553.2025.11092103"},"language":"en","primary_location":{"id":"doi:10.1109/smacd65553.2025.11092103","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd65553.2025.11092103","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004122681","display_name":"Fabian Seiler","orcid":"https://orcid.org/0009-0000-6517-451X"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":true,"raw_author_name":"Fabian Seiler","raw_affiliation_strings":["Technische Universit&#x00E4;t Wien (TU Wien),Austria"],"affiliations":[{"raw_affiliation_string":"Technische Universit&#x00E4;t Wien (TU Wien),Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114618305","display_name":"Peter M. Hinkel","orcid":null},"institutions":[{"id":"https://openalex.org/I223822909","display_name":"Heidelberg University","ror":"https://ror.org/038t36y30","country_code":"DE","type":"education","lineage":["https://openalex.org/I223822909"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Peter M. Hinkel","raw_affiliation_strings":["Heidelberg University,Germany"],"affiliations":[{"raw_affiliation_string":"Heidelberg University,Germany","institution_ids":["https://openalex.org/I223822909"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032163732","display_name":"Axel Jantsch","orcid":"https://orcid.org/0000-0003-2251-0004"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Axel Jantsch","raw_affiliation_strings":["Technische Universit&#x00E4;t Wien (TU Wien),Austria"],"affiliations":[{"raw_affiliation_string":"Technische Universit&#x00E4;t Wien (TU Wien),Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050080301","display_name":"Nima TaheriNejad","orcid":"https://orcid.org/0000-0002-1295-0332"},"institutions":[{"id":"https://openalex.org/I223822909","display_name":"Heidelberg University","ror":"https://ror.org/038t36y30","country_code":"DE","type":"education","lineage":["https://openalex.org/I223822909"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Nima TaheriNejad","raw_affiliation_strings":["Heidelberg University,Germany"],"affiliations":[{"raw_affiliation_string":"Heidelberg University,Germany","institution_ids":["https://openalex.org/I223822909"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5004122681"],"corresponding_institution_ids":["https://openalex.org/I145847075"],"apc_list":null,"apc_paid":null,"fwci":2.429,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.89948683,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6192117929458618}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6192117929458618}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd65553.2025.11092103","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd65553.2025.11092103","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1578783943","https://openalex.org/W1986623396","https://openalex.org/W2025674646","https://openalex.org/W2059441802","https://openalex.org/W2081729575","https://openalex.org/W2664249309","https://openalex.org/W2809226946","https://openalex.org/W4400770655","https://openalex.org/W4404101360","https://openalex.org/W4409660427","https://openalex.org/W4413095961","https://openalex.org/W6790967271","https://openalex.org/W6874104126"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052"],"abstract_inverted_index":{"Memristor-based":[0],"In-Memory":[1],"Computation":[2],"(IMC)":[3],"is":[4,23,38,109,135],"one":[5],"of":[6,41,72,103],"the":[7,11,73,85,101,115],"promising":[8],"candidates":[9],"for":[10,46,59,88],"post-CMOS":[12],"era,":[13],"which":[14,108],"comes":[15],"in":[16,20,114],"many":[17],"flavors.":[18],"Processing":[19],"Array":[21],"(PIA)":[22],"a":[24,39,69,96],"relatively":[25],"new":[26],"approach,":[27],"and":[28,50,64,76,124],"substantially":[29],"different":[30],"than":[31],"traditional":[32],"CMOS-based":[33],"logic":[34],"design.":[35],"Consequently,":[36],"there":[37],"lack":[40],"publicly":[42],"available":[43,136],"CAD":[44],"tools":[45],"memristive":[47,89],"PIA":[48,90],"design":[49,116],"evaluation.":[51],"Here,":[52],"we":[53],"present":[54],"ATOMIC:":[55],"an":[56],"Automatic":[57],"Tool":[58],"Memristive":[60],"IMPLY-based":[61],"Circuit-level":[62],"Simulation":[63],"Validation.":[65],"Using":[66],"our":[67],"tool,":[68],"large":[70],"portion":[71],"simulation,":[74],"evaluation,":[75],"validation":[77],"process":[78],"can":[79,105],"be":[80,106],"performed":[81],"automatically,":[82],"drastically":[83],"reducing":[84],"development":[86],"time":[87],"systems":[91],"from":[92],"multiple":[93],"days":[94],"to":[95],"few":[97],"hours.":[98],"With":[99],"ATOMIC":[100],"effect":[102],"non-idealities":[104],"analyzed,":[107],"important":[110],"but":[111],"often":[112],"unconsidered":[113],"phase.":[117],"We":[118],"evaluated":[119],"Stateof-the-Art":[120],"(SoA)":[121],"adder":[122],"algorithms":[123],"compared":[125],"their":[126],"stability":[127],"when":[128],"calculated":[129],"under":[130],"non-ideal":[131],"conditions.":[132],"The":[133],"code":[134],"at":[137],"https://github.com/fabianseiler/ATOMIC.":[138]},"counts_by_year":[{"year":2025,"cited_by_count":3}],"updated_date":"2026-03-09T08:58:05.943551","created_date":"2025-10-10T00:00:00"}
