{"id":"https://openalex.org/W2787587165","doi":"https://doi.org/10.1109/reconfig.2017.8279823","title":"Synthesis of interleaved multithreaded accelerators from OpenMP loops","display_name":"Synthesis of interleaved multithreaded accelerators from OpenMP loops","publication_year":2017,"publication_date":"2017-12-01","ids":{"openalex":"https://openalex.org/W2787587165","doi":"https://doi.org/10.1109/reconfig.2017.8279823","mag":"2787587165"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2017.8279823","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2017.8279823","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090242105","display_name":"Luk\u00e1\u0161 Sommer","orcid":"https://orcid.org/0000-0003-1918-3911"},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Lukas Sommer","raw_affiliation_strings":["Embedded Systems and Applications Group (ESA), Technische Universit\u00e4t, Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"Embedded Systems and Applications Group (ESA), Technische Universit\u00e4t, Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010007635","display_name":"Julian Oppermann","orcid":"https://orcid.org/0000-0002-8073-720X"},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Julian Oppermann","raw_affiliation_strings":["Embedded Systems and Applications Group (ESA), Technische Universit\u00e4t, Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"Embedded Systems and Applications Group (ESA), Technische Universit\u00e4t, Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088361257","display_name":"Jaco Hofmann","orcid":"https://orcid.org/0000-0003-3691-3293"},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jaco Hofmann","raw_affiliation_strings":["Embedded Systems and Applications Group (ESA), Technische Universit\u00e4t, Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"Embedded Systems and Applications Group (ESA), Technische Universit\u00e4t, Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047000315","display_name":"Andreas Koch","orcid":"https://orcid.org/0000-0002-1164-3082"},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Andreas Koch","raw_affiliation_strings":["Embedded Systems and Applications Group (ESA), Technische Universit\u00e4t, Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"Embedded Systems and Applications Group (ESA), Technische Universit\u00e4t, Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5090242105"],"corresponding_institution_ids":["https://openalex.org/I31512782"],"apc_list":null,"apc_paid":null,"fwci":0.4506,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.64793428,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":93,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8832992315292358},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6906758546829224},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6731640100479126},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.6503178477287292},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.560375988483429},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.5375058650970459},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5058538317680359},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.49104976654052734},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.45616772770881653},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.42035651206970215},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3199501931667328}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8832992315292358},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6906758546829224},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6731640100479126},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.6503178477287292},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.560375988483429},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.5375058650970459},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5058538317680359},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.49104976654052734},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.45616772770881653},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.42035651206970215},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3199501931667328}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2017.8279823","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2017.8279823","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1977157984","https://openalex.org/W2018055497","https://openalex.org/W2030758414","https://openalex.org/W2050504694","https://openalex.org/W2059712825","https://openalex.org/W2075160498","https://openalex.org/W2085884196","https://openalex.org/W2126362242","https://openalex.org/W2135500365","https://openalex.org/W2152956697","https://openalex.org/W2171286674","https://openalex.org/W2287752401","https://openalex.org/W2542189141","https://openalex.org/W2560960843","https://openalex.org/W2933557894","https://openalex.org/W4234180294","https://openalex.org/W4235262323","https://openalex.org/W4239385313","https://openalex.org/W4241148135","https://openalex.org/W6662810467"],"related_works":["https://openalex.org/W2115561485","https://openalex.org/W1985089255","https://openalex.org/W2010970156","https://openalex.org/W2153202644","https://openalex.org/W2105895556","https://openalex.org/W2733115356","https://openalex.org/W2377593213","https://openalex.org/W4235861380","https://openalex.org/W2106625514","https://openalex.org/W3089467468"],"abstract_inverted_index":{"Similarly":[0],"to":[1,26,52,82,91],"CPUs":[2],"and":[3,49,55,102],"GPUs,":[4],"FPGA-based":[5],"accelerators":[6,44],"can":[7],"also":[8],"profit":[9],"from":[10,22,45],"exploiting":[11],"thread-level":[12,70],"parallelism.":[13],"Thus,":[14],"the":[15,20,35,39,53,73,76,80,104,107,125],"synthesis":[16,41],"tools":[17],"for":[18,38,57],"generating":[19],"circuits":[21],"high-level":[23],"languages":[24],"need":[25],"be":[27],"extended":[28],"appropriately.":[29],"We":[30,88],"present":[31],"an":[32],"extension":[33],"of":[34,42,75,95,100,106,120],"Nymble":[36],"hardware/software-co-compiler":[37],"automatic":[40],"hardware":[43],"OpenMP":[46],"worksharing":[47],"loops,":[48],"describe":[50],"modifications":[51],"datapath-":[54],"memory-architecture":[56],"multi-threaded":[58],"execution.":[59],"The":[60],"new":[61],"execution":[62],"model":[63],"employs":[64],"both":[65],"spatial":[66],"as":[67,69],"well":[68],"parallelism":[71],"in":[72],"micro-architecture":[74],"generated":[77],"accelerator,":[78],"with":[79],"aim":[81],"efficiently":[83],"hide":[84],"memory":[85],"access":[86],"latencies.":[87],"are":[89],"able":[90],"gain":[92],"raw":[93],"speedups":[94],"more":[96,111],"than":[97,112],"a":[98,121],"factor":[99,113],"3x,":[101],"improve":[103],"utilization":[105],"computing":[108,126],"unit":[109],"by":[110],"8x,":[114],"when":[115],"executing":[116],"four":[117],"threads":[118],"instead":[119],"single":[122],"one":[123],"on":[124],"units.":[127]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
