{"id":"https://openalex.org/W4415398968","doi":"https://doi.org/10.1109/prime66228.2025.11203337","title":"A 0.3V Hysteresis Comparator with Bulk-Based SRAM Output Stage","display_name":"A 0.3V Hysteresis Comparator with Bulk-Based SRAM Output Stage","publication_year":2025,"publication_date":"2025-09-21","ids":{"openalex":"https://openalex.org/W4415398968","doi":"https://doi.org/10.1109/prime66228.2025.11203337"},"language":"en","primary_location":{"id":"doi:10.1109/prime66228.2025.11203337","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203337","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5104320047","display_name":"Giovanni Nicolini","orcid":"https://orcid.org/0009-0007-2765-9947"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giovanni Nicolini","raw_affiliation_strings":["La Sapienza University of Rome,Via Eudossiana 18,Rome,IT,00184"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"La Sapienza University of Rome,Via Eudossiana 18,Rome,IT,00184","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016342533","display_name":"Riccardo Della Sala","orcid":"https://orcid.org/0000-0001-9990-4875"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Riccardo Della Sala","raw_affiliation_strings":["La Sapienza University of Rome,Via Eudossiana 18,Rome,IT,00184"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"La Sapienza University of Rome,Via Eudossiana 18,Rome,IT,00184","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010336494","display_name":"Giuseppe Scotti","orcid":"https://orcid.org/0000-0002-5650-8212"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Scotti","raw_affiliation_strings":["La Sapienza University of Rome,Via Eudossiana 18,Rome,IT,00184"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"La Sapienza University of Rome,Via Eudossiana 18,Rome,IT,00184","institution_ids":["https://openalex.org/I861853513"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I861853513"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11222","display_name":"Magnetic Properties and Applications","score":0.9919000267982483,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9836999773979187,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8934000134468079},{"id":"https://openalex.org/keywords/hysteresis","display_name":"Hysteresis","score":0.7806000113487244},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.6147000193595886},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5080000162124634},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.47450000047683716},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.44020000100135803},{"id":"https://openalex.org/keywords/schmitt-trigger","display_name":"Schmitt trigger","score":0.4138000011444092}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8934000134468079},{"id":"https://openalex.org/C123299182","wikidata":"https://www.wikidata.org/wiki/Q190837","display_name":"Hysteresis","level":2,"score":0.7806000113487244},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.6147000193595886},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5424000024795532},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5080000162124634},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.47450000047683716},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.44020000100135803},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.41940000653266907},{"id":"https://openalex.org/C90201813","wikidata":"https://www.wikidata.org/wiki/Q202957","display_name":"Schmitt trigger","level":3,"score":0.4138000011444092},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.41339999437332153},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3474999964237213},{"id":"https://openalex.org/C121649978","wikidata":"https://www.wikidata.org/wiki/Q17007408","display_name":"Comparator applications","level":4,"score":0.34470000863075256},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.3327000141143799},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.32829999923706055},{"id":"https://openalex.org/C146357865","wikidata":"https://www.wikidata.org/wiki/Q1123245","display_name":"Stage (stratigraphy)","level":2,"score":0.32499998807907104},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3100999891757965},{"id":"https://openalex.org/C2779585090","wikidata":"https://www.wikidata.org/wiki/Q3457762","display_name":"Resilience (materials science)","level":2,"score":0.29829999804496765},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2705000042915344},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.26930001378059387},{"id":"https://openalex.org/C3020376581","wikidata":"https://www.wikidata.org/wiki/Q16866784","display_name":"Single stage","level":2,"score":0.26249998807907104}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/prime66228.2025.11203337","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203337","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/1771340","is_oa":false,"landing_page_url":"https://hdl.handle.net/11573/1771340","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"A":[0],"hysteresis":[1,38,55],"comparator":[2,71],"for":[3,17,89],"ultra-low-voltage":[4],"asynchronous":[5],"Sigma-Delta":[6],"Modulators":[7],"is":[8],"presented,":[9],"featuring":[10],"a":[11,25,37,66],"regenerative":[12],"bulk-based":[13],"SRAM":[14],"output":[15],"stage":[16],"rail-to-rail":[18],"operation":[19],"and":[20,36,50,82,95],"enhanced":[21],"speed.":[22],"Simulations":[23],"show":[24],"delay":[26],"of":[27,33,40],"$35.91":[28],"\\mu":[29],"\\mathrm{~s}$,":[30],"power":[31],"dissipation":[32],"7.27":[34],"nW,":[35],"threshold":[39],"4.20":[41],"mV.":[42],"The":[43],"design":[44],"exhibits":[45],"strong":[46],"resilience":[47],"under":[48],"PVT":[49],"mismatch":[51],"variations.":[52],"An":[53],"analytical":[54],"model,":[56],"validated":[57],"through":[58],"simulation,":[59],"closely":[60],"matches":[61],"observed":[62],"behavior.":[63],"Compared":[64],"to":[65,75],"state-of-the-art":[67],"solution,":[68],"the":[69],"proposed":[70],"achieves":[72],"an":[73],"up":[74],"$2":[76],"\\times$":[77],"faster":[78],"delay,":[79],"lower":[80],"power,":[81],"more":[83],"stable":[84],"hysteresis,":[85],"making":[86],"it":[87],"well-suited":[88],"low-power":[90],"analog":[91],"applications":[92],"in":[93],"IoT":[94],"biomedical":[96],"systems.":[97]},"counts_by_year":[],"updated_date":"2026-07-25T15:57:00.446498","created_date":"2025-10-22T00:00:00"}