{"id":"https://openalex.org/W4417403283","doi":"https://doi.org/10.1109/pact65351.2025.00031","title":"Automatic Code-Generation for Accelerating Structured-Mesh-Based Explicit Numerical Solvers on FPGAs","display_name":"Automatic Code-Generation for Accelerating Structured-Mesh-Based Explicit Numerical Solvers on FPGAs","publication_year":2025,"publication_date":"2025-11-03","ids":{"openalex":"https://openalex.org/W4417403283","doi":"https://doi.org/10.1109/pact65351.2025.00031"},"language":null,"primary_location":{"id":"doi:10.1109/pact65351.2025.00031","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pact65351.2025.00031","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 34th International Conference on Parallel Architectures and Compilation Techniques (PACT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5093603652","display_name":"Beniel Thileepan","orcid":"https://orcid.org/0009-0006-6891-3553"},"institutions":[{"id":"https://openalex.org/I39555362","display_name":"University of Warwick","ror":"https://ror.org/01a77tt86","country_code":"GB","type":"education","lineage":["https://openalex.org/I39555362"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Beniel Thileepan","raw_affiliation_strings":["University of Warwick,Department of Computer Science,Coventry,United Kingdom"],"affiliations":[{"raw_affiliation_string":"University of Warwick,Department of Computer Science,Coventry,United Kingdom","institution_ids":["https://openalex.org/I39555362"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032556461","display_name":"Suhaib A. Fahmy","orcid":"https://orcid.org/0000-0003-0568-5048"},"institutions":[{"id":"https://openalex.org/I71920554","display_name":"King Abdullah University of Science and Technology","ror":"https://ror.org/01q3tbs38","country_code":"SA","type":"education","lineage":["https://openalex.org/I71920554"]}],"countries":["SA"],"is_corresponding":false,"raw_author_name":"Suhaib A. Fahmy","raw_affiliation_strings":["King Abdullah University of Science and Technology (KAUST),Thuwal,Saudi Arabia"],"affiliations":[{"raw_affiliation_string":"King Abdullah University of Science and Technology (KAUST),Thuwal,Saudi Arabia","institution_ids":["https://openalex.org/I71920554"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070789282","display_name":"Gihan R. Mudalige","orcid":"https://orcid.org/0000-0002-1398-5174"},"institutions":[{"id":"https://openalex.org/I39555362","display_name":"University of Warwick","ror":"https://ror.org/01a77tt86","country_code":"GB","type":"education","lineage":["https://openalex.org/I39555362"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Gihan R. Mudalige","raw_affiliation_strings":["University of Warwick,Department of Computer Science,Coventry,United Kingdom"],"affiliations":[{"raw_affiliation_string":"University of Warwick,Department of Computer Science,Coventry,United Kingdom","institution_ids":["https://openalex.org/I39555362"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5093603652"],"corresponding_institution_ids":["https://openalex.org/I39555362"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.46722618,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"243","last_page":"256"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.6901999711990356,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.6901999711990356,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10792","display_name":"Matrix Theory and Algorithms","score":0.06360000371932983,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.03180000185966492,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/stencil","display_name":"Stencil","score":0.965499997138977},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5289999842643738},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5288000106811523},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.4205000102519989},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.40209999680519104},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.38510000705718994},{"id":"https://openalex.org/keywords/chaining","display_name":"Chaining","score":0.35989999771118164}],"concepts":[{"id":"https://openalex.org/C76752949","wikidata":"https://www.wikidata.org/wiki/Q7607499","display_name":"Stencil","level":2,"score":0.965499997138977},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8116000294685364},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6456000208854675},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5289999842643738},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5288000106811523},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.4205000102519989},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.4099999964237213},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.40209999680519104},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.38510000705718994},{"id":"https://openalex.org/C49020025","wikidata":"https://www.wikidata.org/wiki/Q1059099","display_name":"Chaining","level":2,"score":0.35989999771118164},{"id":"https://openalex.org/C175309249","wikidata":"https://www.wikidata.org/wiki/Q725864","display_name":"Pipeline transport","level":2,"score":0.33410000801086426},{"id":"https://openalex.org/C139571649","wikidata":"https://www.wikidata.org/wiki/Q1156793","display_name":"Program optimization","level":3,"score":0.3199000060558319},{"id":"https://openalex.org/C75949130","wikidata":"https://www.wikidata.org/wiki/Q848010","display_name":"Database transaction","level":2,"score":0.30790001153945923},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3052999973297119},{"id":"https://openalex.org/C162319229","wikidata":"https://www.wikidata.org/wiki/Q175263","display_name":"Data structure","level":2,"score":0.2930999994277954},{"id":"https://openalex.org/C142614401","wikidata":"https://www.wikidata.org/wiki/Q777433","display_name":"Forward chaining","level":3,"score":0.2888000011444092},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.27619999647140503},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.2703000009059906},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.2667999863624573},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.266400009393692},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.25769999623298645}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/pact65351.2025.00031","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pact65351.2025.00031","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 34th International Conference on Parallel Architectures and Compilation Techniques (PACT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1523297099","https://openalex.org/W1968370502","https://openalex.org/W2072159554","https://openalex.org/W2129471558","https://openalex.org/W2141280299","https://openalex.org/W2247698914","https://openalex.org/W2296730406","https://openalex.org/W2529513625","https://openalex.org/W2538589664","https://openalex.org/W2608177516","https://openalex.org/W2771210328","https://openalex.org/W2804539094","https://openalex.org/W2899691047","https://openalex.org/W2905585545","https://openalex.org/W2906737788","https://openalex.org/W2943018941","https://openalex.org/W2987684178","https://openalex.org/W3138353446","https://openalex.org/W3174830286","https://openalex.org/W3202528256","https://openalex.org/W4255162882","https://openalex.org/W4282972450","https://openalex.org/W4308168732","https://openalex.org/W4388561563","https://openalex.org/W4413145118","https://openalex.org/W7110310012"],"related_works":[],"abstract_inverted_index":{"Structured-mesh-based":[0],"stencil":[1,54,108],"computations":[2],"are":[3],"a":[4,45,59,71],"common":[5],"motif":[6],"in":[7],"many":[8],"numerical":[9],"algorithms,":[10],"such":[11],"as":[12],"for":[13],"solving":[14],"PDEs.":[15],"Recent":[16],"work":[17],"has":[18],"shown":[19],"promising":[20],"runtime":[21],"performance":[22,100,131],"and":[23,41,67,76],"energy":[24,134],"efficiency":[25],"when":[26],"mapping":[27,52],"these":[28],"applications":[29,55],"to":[30,56,95,121],"FPGAs.":[31,57],"However,":[32],"this":[33],"requires":[34],"significant":[35],"manual":[36],"effort":[37],"with":[38,132],"hardwarespecific":[39],"optimizations":[40],"customization.":[42],"We":[43,87],"present":[44],"new":[46],"codegeneration":[47],"framework":[48,63],"that":[49,82,89],"automates":[50],"the":[51,62,90,99],"of":[53,101,107],"From":[58],"domain-specific":[60],"declaration,":[61],"applies":[64],"radical,":[65],"ad-hoc,":[66],"dynamic":[68],"optimizations,":[69],"including":[70,111],"novel":[72],"window-buffer":[73],"chaining":[74],"scheme,":[75],"an":[77,125],"on-chip":[78],"loopback":[79],"pipeline":[80],"approach":[81],"minimizes":[83],"memory":[84],"transaction":[85],"overhead.":[86],"show":[88],"generated":[91],"code":[92],"is":[93],"able":[94],"match":[96],"or":[97],"exceed":[98],"hand-tuned":[102],"state-of-the-art":[103],"designs.":[104],"A":[105],"range":[106],"solvers":[109,123],"benchmarked,":[110],"non-trivial":[112],"multi-stencil":[113],"solvers,":[114],"on":[115,124],"two":[116],"FPGAs,":[117],"demonstrating":[118],"performanceportability.":[119],"Comparisons":[120],"best-in-class":[122],"Nvidia":[126],"H100":[127],"GPU":[128],"indicate":[129],"competitive":[130],"2-19\u00d7":[133],"savings.":[135]},"counts_by_year":[],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-12-16T00:00:00"}