{"id":"https://openalex.org/W4243384245","doi":"https://doi.org/10.1109/pact.2003.1238016","title":"Memory hierarchy design for a multiprocessor look-up engine","display_name":"Memory hierarchy design for a multiprocessor look-up engine","publication_year":2004,"publication_date":"2004-03-22","ids":{"openalex":"https://openalex.org/W4243384245","doi":"https://doi.org/10.1109/pact.2003.1238016"},"language":"en","primary_location":{"id":"doi:10.1109/pact.2003.1238016","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pact.2003.1238016","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Oceans 2002 Conference and Exhibition. Conference Proceedings (Cat. No.02CH37362)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057215541","display_name":"J.-L. Baer","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"J.-L. Baer","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Washington, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Washington, USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031403708","display_name":"D. Low","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Low","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Washington, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Washington, USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021661823","display_name":"P. Crowley","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Crowley","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Washington, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Washington, USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005970737","display_name":"N. Sidhwaney","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N. Sidhwaney","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Washington, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Washington, USA","institution_ids":["https://openalex.org/I201448701"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5057215541"],"corresponding_institution_ids":["https://openalex.org/I201448701"],"apc_list":null,"apc_paid":null,"fwci":0.7899,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.74579147,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"206","last_page":"216"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.9876999855041504,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8168666362762451},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6813960075378418},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.6249735355377197},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5520124435424805},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.44870060682296753},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.4266735911369324},{"id":"https://openalex.org/keywords/non-uniform-memory-access","display_name":"Non-uniform memory access","score":0.42528796195983887},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.4140922725200653},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36606109142303467},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.3515051603317261}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8168666362762451},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6813960075378418},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.6249735355377197},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5520124435424805},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.44870060682296753},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.4266735911369324},{"id":"https://openalex.org/C133371097","wikidata":"https://www.wikidata.org/wiki/Q868014","display_name":"Non-uniform memory access","level":5,"score":0.42528796195983887},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.4140922725200653},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36606109142303467},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.3515051603317261}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/pact.2003.1238016","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pact.2003.1238016","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Oceans 2002 Conference and Exhibition. Conference Proceedings (Cat. No.02CH37362)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7099999785423279,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1705280236","https://openalex.org/W1968801809","https://openalex.org/W2050578301","https://openalex.org/W2083127638","https://openalex.org/W2108190694","https://openalex.org/W2119214660","https://openalex.org/W2147505015","https://openalex.org/W2147629974","https://openalex.org/W2162597606","https://openalex.org/W2752061190","https://openalex.org/W4245232836","https://openalex.org/W4248306587","https://openalex.org/W6637683424"],"related_works":["https://openalex.org/W2114386333","https://openalex.org/W2133489088","https://openalex.org/W2098406302","https://openalex.org/W2734782074","https://openalex.org/W2363769136","https://openalex.org/W2217292995","https://openalex.org/W2115782696","https://openalex.org/W3145643808","https://openalex.org/W2966447112","https://openalex.org/W2541463506"],"abstract_inverted_index":{"We":[0],"investigate":[1],"the":[2,24,42,45,48,53,62,73,79,94,106,123,135],"implementation":[3],"of":[4,26,44,58,64,81,85,108,126,137],"IP":[5],"look-up":[6],"for":[7,29],"core":[8],"routers":[9],"using":[10,88],"multiple":[11],"microengines":[12],"and":[13,27,56,77,104],"a":[14,33,69,109,130],"tailored":[15],"memory":[16,30,54,59,75],"hierarchy.":[17],"The":[18],"main":[19,46],"architectural":[20],"concerns":[21],"are":[22],"limiting":[23],"number":[25,57,125],"contention":[28],"accesses.":[31,60],"Using":[32],"level":[34],"compressed":[35],"trie":[36],"as":[37],"an":[38,120],"index,":[39],"we":[40,66],"show":[41,67,92],"impact":[43],"parameter,":[47],"root":[49],"branching":[50],"factor,":[51],"on":[52],"capacity":[55,76],"Despite":[61],"lack":[63],"locality,":[65],"how":[68],"cache":[70,112],"can":[71],"reduce":[72],"required":[74,138],"limit":[78],"amount":[80,136],"expensive":[82],"multibanking.":[83],"Results":[84],"simulation":[86],"experiments":[87],"contemporary":[89],"routing":[90],"tables":[91],"that":[93,105],"architecture":[95,121],"scales":[96],"well,":[97],"at":[98],"least":[99],"up":[100,116],"to":[101,117],"16":[102],"processors,":[103],"presence":[107],"small":[110],"on-chip":[111],"increases":[113],"throughput":[114],"significantly,":[115],"65%":[118],"over":[119],"with":[122],"same":[124],"processors":[127],"but":[128],"without":[129],"cache,":[131],"all":[132],"while":[133],"reducing":[134],"off-chip":[139],"memory.":[140]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}