{"id":"https://openalex.org/W4402753284","doi":"https://doi.org/10.1109/mwscas60917.2024.10658770","title":"Modular Extended Range Divider For Multi Band Phase Locked Loop","display_name":"Modular Extended Range Divider For Multi Band Phase Locked Loop","publication_year":2024,"publication_date":"2024-08-11","ids":{"openalex":"https://openalex.org/W4402753284","doi":"https://doi.org/10.1109/mwscas60917.2024.10658770"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas60917.2024.10658770","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mwscas60917.2024.10658770","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068156956","display_name":"Rizwan Shaik Peerla","orcid":"https://orcid.org/0000-0002-3867-9878"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Rizwan Shaik Peerla","raw_affiliation_strings":["Green PMU Semi Pvt. Ltd.,Hyderabad,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Green PMU Semi Pvt. Ltd.,Hyderabad,India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5075623958","display_name":"Bibhu Datta Sahoo","orcid":"https://orcid.org/0000-0002-3563-9096"},"institutions":[{"id":"https://openalex.org/I63190737","display_name":"University at Buffalo, State University of New York","ror":"https://ror.org/01y64my43","country_code":"US","type":"education","lineage":["https://openalex.org/I63190737"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bibhu Datta Sahoo","raw_affiliation_strings":["University at Buffalo,Department of Electrical Engineering,Buffalo,NY,14260"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University at Buffalo,Department of Electrical Engineering,Buffalo,NY,14260","institution_ids":["https://openalex.org/I63190737"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12759969,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"310","last_page":"313"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9941999912261963,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9941999912261963,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5829207301139832},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5174992084503174},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.5162146687507629},{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.5161958336830139},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.47733810544013977},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4617606997489929},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.4587097764015198},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3705434203147888},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.35620060563087463},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.33414435386657715},{"id":"https://openalex.org/keywords/power-dividers-and-directional-couplers","display_name":"Power dividers and directional couplers","score":0.2733638882637024},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.2658786177635193},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20370429754257202},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1336463987827301},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.08906182646751404},{"id":"https://openalex.org/keywords/aerospace-engineering","display_name":"Aerospace engineering","score":0.07098183035850525},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.0674360990524292}],"concepts":[{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5829207301139832},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5174992084503174},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.5162146687507629},{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.5161958336830139},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.47733810544013977},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4617606997489929},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.4587097764015198},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3705434203147888},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.35620060563087463},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.33414435386657715},{"id":"https://openalex.org/C202988678","wikidata":"https://www.wikidata.org/wiki/Q1417986","display_name":"Power dividers and directional couplers","level":2,"score":0.2733638882637024},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.2658786177635193},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20370429754257202},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1336463987827301},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.08906182646751404},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.07098183035850525},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0674360990524292},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas60917.2024.10658770","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mwscas60917.2024.10658770","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1123162562","https://openalex.org/W1982801875","https://openalex.org/W1985335336","https://openalex.org/W2139625690","https://openalex.org/W2176597669","https://openalex.org/W2410273639","https://openalex.org/W2758171403","https://openalex.org/W3033238766","https://openalex.org/W4313187453"],"related_works":["https://openalex.org/W1576949837","https://openalex.org/W4360861688","https://openalex.org/W3134930219","https://openalex.org/W984417604","https://openalex.org/W2967785526","https://openalex.org/W3144043557","https://openalex.org/W2353997301","https://openalex.org/W2347235883","https://openalex.org/W2017031079","https://openalex.org/W2323690069"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,55],"modular":[4],"extended":[5,33],"range":[6,34],"divider":[7,20,35,41,46],"structure":[8],"for":[9],"multi-band":[10],"phase":[11],"locked":[12],"loop.":[13],"The":[14,45,72],"design":[15],"of":[16,31],"the":[17,25,32,37,43],"proposed":[18],"2/3":[19],"cell":[21],"is":[22,47,84],"such":[23],"that":[24],"power":[26],"consumption":[27],"and":[28,36,59,69,78,92],"chip":[29],"area":[30],"conventional":[38],"multi":[39],"modulus":[40],"are":[42],"same.":[44],"designed":[48],"in":[49],"TSMC":[50],"65":[51],"nm":[52],"CMOS":[53],"using":[54],"1.2":[56],"V":[57],"supply":[58],"has":[60],"been":[61],"verified":[62],"to":[63],"work":[64],"reliably":[65],"across":[66],"process,":[67],"voltage,":[68],"temperature":[70],"variation.":[71],"worst":[73],"case":[74],"current,":[75],"rise":[76],"time,":[77],"fall":[79],"time":[80],"at":[81],"2.5":[82],"GHz":[83],"420":[85],"<tex":[86],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[87],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$\\mu":[88],"\\mathbf{A},":[89],"12.2$</tex>":[90],"ps,":[91,94],"10.8":[93],"respectively.":[95]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
