{"id":"https://openalex.org/W4240535691","doi":"https://doi.org/10.1109/micro.2001.991128","title":"Dynamic speculative precomputation","display_name":"Dynamic speculative precomputation","publication_year":2005,"publication_date":"2005-08-25","ids":{"openalex":"https://openalex.org/W4240535691","doi":"https://doi.org/10.1109/micro.2001.991128"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2001.991128","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2001.991128","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture. MICRO-34","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005994838","display_name":"Jamison D. Collins","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"J.D. Collins","raw_affiliation_strings":["Department of Computer Science and Engineering, University of California, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of California, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065583627","display_name":"Dean M. Tullsen","orcid":"https://orcid.org/0000-0003-3174-9316"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.M. Tullsen","raw_affiliation_strings":["Department of Computer Science and Engineering, University of California, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of California, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100371015","display_name":"Hong Wang","orcid":"https://orcid.org/0009-0008-2874-2168"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hong Wang","raw_affiliation_strings":["Microprocessor Research Laboratory, Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microprocessor Research Laboratory, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007315039","display_name":"John Paul Shen","orcid":"https://orcid.org/0000-0003-4588-2775"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.P. Shen","raw_affiliation_strings":["Microprocessor Research Laboratory, Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microprocessor Research Laboratory, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5005994838"],"corresponding_institution_ids":["https://openalex.org/I36258959"],"apc_list":null,"apc_paid":null,"fwci":3.8671,"has_fulltext":false,"cited_by_count":53,"citation_normalized_percentile":{"value":0.93696854,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"306","last_page":"317"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/precomputation","display_name":"Precomputation","score":0.9750497341156006},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8873642683029175},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7048696875572205},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.6871504783630371},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6555763483047485},{"id":"https://openalex.org/keywords/pointer","display_name":"Pointer (user interface)","score":0.587637186050415},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5098618268966675},{"id":"https://openalex.org/keywords/pointer-analysis","display_name":"Pointer analysis","score":0.4993860721588135},{"id":"https://openalex.org/keywords/static-analysis","display_name":"Static analysis","score":0.32817399501800537},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.32666337490081787},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.27523988485336304},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.21880725026130676},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19636499881744385}],"concepts":[{"id":"https://openalex.org/C159379195","wikidata":"https://www.wikidata.org/wiki/Q7239568","display_name":"Precomputation","level":3,"score":0.9750497341156006},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8873642683029175},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7048696875572205},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.6871504783630371},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6555763483047485},{"id":"https://openalex.org/C150202949","wikidata":"https://www.wikidata.org/wiki/Q107602","display_name":"Pointer (user interface)","level":2,"score":0.587637186050415},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5098618268966675},{"id":"https://openalex.org/C7263679","wikidata":"https://www.wikidata.org/wiki/Q5978076","display_name":"Pointer analysis","level":3,"score":0.4993860721588135},{"id":"https://openalex.org/C97686452","wikidata":"https://www.wikidata.org/wiki/Q7604153","display_name":"Static analysis","level":2,"score":0.32817399501800537},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32666337490081787},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.27523988485336304},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.21880725026130676},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19636499881744385},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/micro.2001.991128","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2001.991128","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture. MICRO-34","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1491178396","https://openalex.org/W1539430313","https://openalex.org/W2044773873","https://openalex.org/W2078081736","https://openalex.org/W2118532220","https://openalex.org/W2153515302","https://openalex.org/W2154512574","https://openalex.org/W2165423885","https://openalex.org/W2168214303","https://openalex.org/W2168307289","https://openalex.org/W3013744194","https://openalex.org/W3142147837","https://openalex.org/W4231131543","https://openalex.org/W4231652969","https://openalex.org/W4232645751","https://openalex.org/W4237150160","https://openalex.org/W4242484660","https://openalex.org/W4249929199","https://openalex.org/W4255602098","https://openalex.org/W6684430692"],"related_works":["https://openalex.org/W2133693067","https://openalex.org/W2131498141","https://openalex.org/W4231131543","https://openalex.org/W4233349421","https://openalex.org/W2010970156","https://openalex.org/W2100250245","https://openalex.org/W2998169068","https://openalex.org/W4244698026","https://openalex.org/W4240535691","https://openalex.org/W2146246439"],"abstract_inverted_index":{"A":[0],"large":[1],"number":[2],"of":[3,83,97,104,121],"memory":[4,98],"accesses":[5],"in":[6],"memory-bound":[7],"applications":[8],"are":[9,48],"irregular,":[10],"such":[11],"as":[12],"pointer":[13],"dereferences,":[14],"and":[15,61,78,112],"can":[16],"be":[17],"effectively":[18],"targeted":[19],"by":[20],"thread-based":[21],"prefetching":[22],"techniques":[23,28,53],"like":[24],"Speculative":[25,69],"Precomputation.":[26],"These":[27],"execute":[29],"instructions,":[30],"for":[31],"example":[32],"on":[33],"an":[34,101],"available":[35],"SMT":[36],"thread":[37],"context,":[38],"that":[39],"have":[40],"been":[41],"extracted":[42],"directly":[43],"from":[44],"the":[45,81,90],"program":[46],"they":[47],"trying":[49],"to":[50,59,116],"accelerate.":[51],"Proposed":[52],"typically":[54],"require":[55],"manual":[56],"user":[57],"intervention":[58],"extract":[60],"optimize":[62],"instruction":[63,75,85],"sequences.":[64],"This":[65],"paper":[66],"proposes":[67],"Dynamic":[68],"Precomputation,":[70],"which":[71],"performs":[72],"all":[73],"necessary":[74],"analysis,":[76],"extraction,":[77],"optimization":[79],"through":[80],"use":[82,120],"back-end":[84],"analysis":[86],"hardware,":[87],"located":[88],"off":[89],"processor's":[91],"critical":[92],"path.":[93],"For":[94],"a":[95],"set":[96],"limited":[99],"benchmarks":[100],"average":[102],"speedup":[103],"14%":[105],"is":[106],"achieved":[107],"when":[108,118],"constructing":[109],"simple":[110],"p-slices,":[111],"this":[113],"gain":[114],"grows":[115],"33%":[117],"making":[119],"aggressive":[122],"optimizations.":[123]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-01-09T23:09:53.351390","created_date":"2025-10-10T00:00:00"}