{"id":"https://openalex.org/W4255670970","doi":"https://doi.org/10.1109/memcod.2003.1210096","title":"Using SSDE for USB2.0 conformance co-verification","display_name":"Using SSDE for USB2.0 conformance co-verification","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W4255670970","doi":"https://doi.org/10.1109/memcod.2003.1210096"},"language":"en","primary_location":{"id":"doi:10.1109/memcod.2003.1210096","is_oa":false,"landing_page_url":"https://doi.org/10.1109/memcod.2003.1210096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"First ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2003. MEMOCODE '03. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034611832","display_name":"T.J.-F. Omnes","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"T.J.-F. Omnes","raw_affiliation_strings":["Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland"],"affiliations":[{"raw_affiliation_string":"Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015168130","display_name":"G. Postuma","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"G. Postuma","raw_affiliation_strings":["Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland"],"affiliations":[{"raw_affiliation_string":"Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035098901","display_name":"J. VerHaegh","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"J. VerHaegh","raw_affiliation_strings":["Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland"],"affiliations":[{"raw_affiliation_string":"Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030621168","display_name":"M. Boonen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Boonen","raw_affiliation_strings":["Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland"],"affiliations":[{"raw_affiliation_string":"Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065525818","display_name":"N. Gatherer","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"N. Gatherer","raw_affiliation_strings":["Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland"],"affiliations":[{"raw_affiliation_string":"Chief Technology Office, Design Technology Group, Philips Semiconductors, Switzerland","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5034611832"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.41061861,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"113","last_page":"122"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7526217699050903},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.6213131546974182},{"id":"https://openalex.org/keywords/conformance-testing","display_name":"Conformance testing","score":0.5705164074897766},{"id":"https://openalex.org/keywords/software-deployment","display_name":"Software deployment","score":0.5635871887207031},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5282097458839417},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.5275359153747559},{"id":"https://openalex.org/keywords/software-verification","display_name":"Software verification","score":0.5009059906005859},{"id":"https://openalex.org/keywords/verification","display_name":"Verification","score":0.4802127778530121},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.47554680705070496},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.4735799729824066},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4723033905029297},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4560960531234741},{"id":"https://openalex.org/keywords/obstacle","display_name":"Obstacle","score":0.44065988063812256},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.26678353548049927},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.2598608732223511},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2301110327243805},{"id":"https://openalex.org/keywords/software-construction","display_name":"Software construction","score":0.13894027471542358},{"id":"https://openalex.org/keywords/standardization","display_name":"Standardization","score":0.08381280303001404}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7526217699050903},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.6213131546974182},{"id":"https://openalex.org/C76844732","wikidata":"https://www.wikidata.org/wiki/Q4072285","display_name":"Conformance testing","level":3,"score":0.5705164074897766},{"id":"https://openalex.org/C105339364","wikidata":"https://www.wikidata.org/wiki/Q2297740","display_name":"Software deployment","level":2,"score":0.5635871887207031},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5282097458839417},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.5275359153747559},{"id":"https://openalex.org/C33054407","wikidata":"https://www.wikidata.org/wiki/Q6504747","display_name":"Software verification","level":5,"score":0.5009059906005859},{"id":"https://openalex.org/C142284323","wikidata":"https://www.wikidata.org/wiki/Q7921323","display_name":"Verification","level":5,"score":0.4802127778530121},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.47554680705070496},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.4735799729824066},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4723033905029297},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4560960531234741},{"id":"https://openalex.org/C2776650193","wikidata":"https://www.wikidata.org/wiki/Q264661","display_name":"Obstacle","level":2,"score":0.44065988063812256},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.26678353548049927},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.2598608732223511},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2301110327243805},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.13894027471542358},{"id":"https://openalex.org/C188087704","wikidata":"https://www.wikidata.org/wiki/Q369577","display_name":"Standardization","level":2,"score":0.08381280303001404},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/memcod.2003.1210096","is_oa":false,"landing_page_url":"https://doi.org/10.1109/memcod.2003.1210096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"First ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2003. MEMOCODE '03. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W87215479","https://openalex.org/W221670187","https://openalex.org/W1747687434","https://openalex.org/W2137045371","https://openalex.org/W2170014513","https://openalex.org/W4230027260","https://openalex.org/W6603544737","https://openalex.org/W6684208002","https://openalex.org/W6684775094","https://openalex.org/W6812044529"],"related_works":["https://openalex.org/W3120172095","https://openalex.org/W2108860137","https://openalex.org/W2118572231","https://openalex.org/W2013077575","https://openalex.org/W2138343703","https://openalex.org/W2997541867","https://openalex.org/W3036403349","https://openalex.org/W2809618173","https://openalex.org/W2162615969","https://openalex.org/W1522369122"],"abstract_inverted_index":{"Keeping":[0],"up":[1],"with":[2],"the":[3,10,39,121,128,140],"increase":[4],"in":[5,102,108,127],"system":[6],"design":[7,19],"complexity":[8],"requires":[9],"deployment":[11],"of":[12,28,38,77,142],"extensive":[13],"engineering":[14],"re-use":[15],"technologies,":[16],"so-called":[17],"platform-based":[18],"techniques":[20],"(Chang":[21],"et":[22,88],"al.,":[23,89],"1999).":[24],"When":[25],"creating":[26],"derivatives":[27],"such":[29],"a":[30,49,67,109,113],"complex":[31],"systems-on-chip":[32],"(SOC)":[33],"platform,":[34],"verification":[35,46],"represents":[36],"70%":[37],"overall":[40],"cost.":[41],"In":[42,135],"this":[43,103,136],"process,":[44],"functional":[45,117],"has":[47],"become":[48],"huge":[50],"obstacle.":[51],"Engineers":[52],"are":[53],"assumed":[54],"to":[55,58,61],"know":[56],"how":[57],"ensure":[59],"conformance":[60,146],"an":[62,95],"ambiguous":[63],"specification":[64],"by":[65],"developing":[66],"million":[68],"test":[69],"vectors,":[70],"which":[71],"may":[72],"represent":[73],"only":[74],"50":[75],"milliseconds":[76],"real-time":[78],"operation":[79],"underlines":[80],"Bob":[81],"Payne,":[82],"CTO":[83],"Philips":[84],"Semiconductors":[85],"US":[86],"(Scott":[87],"2001).":[90],"Moreover,":[91],"software":[92,114],"is":[93],"playing":[94],"increasing":[96],"if":[97],"not":[98],"dominant":[99],"role":[100],"especially":[101],"platform":[104],"derivative":[105],"game,":[106],"resulting":[107],"burning":[110],"need":[111],"for":[112,144],"and":[115],"hardware":[116],"co-verification":[118],"solution":[119],"at":[120],"integrated":[122],"SOC":[123],"level":[124],"but":[125],"also":[126],"early":[129],"intellectual":[130],"property":[131],"(IP)":[132],"development":[133],"cycles.":[134],"paper":[137],"we":[138],"illustrate":[139],"use":[141],"SSDE":[143],"USB2.0":[145],"co-verification.":[147]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
