{"id":"https://openalex.org/W2019829264","doi":"https://doi.org/10.1109/mdt.1995.466370","title":"Concurrent error detection using monitoring machines","display_name":"Concurrent error detection using monitoring machines","publication_year":1995,"publication_date":"1995-01-01","ids":{"openalex":"https://openalex.org/W2019829264","doi":"https://doi.org/10.1109/mdt.1995.466370","mag":"2019829264"},"language":"en","primary_location":{"id":"doi:10.1109/mdt.1995.466370","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.1995.466370","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028519358","display_name":"Rubin Parekhji","orcid":"https://orcid.org/0009-0000-6625-2786"},"institutions":[{"id":"https://openalex.org/I891191580","display_name":"Aalborg University","ror":"https://ror.org/04m5j1k67","country_code":"DK","type":"education","lineage":["https://openalex.org/I891191580"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"R. Parekhji","raw_affiliation_strings":["Aalborg University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Aalborg University","institution_ids":["https://openalex.org/I891191580"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103247231","display_name":"G. Venkatesh","orcid":"https://orcid.org/0009-0004-8691-1573"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"G. Venkatesh","raw_affiliation_strings":["Nokia \u2013 Bell Labs, Aalborg, Denmark"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nokia \u2013 Bell Labs, Aalborg, Denmark","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029423576","display_name":"S.D. Sherlekar","orcid":null},"institutions":[{"id":"https://openalex.org/I891191580","display_name":"Aalborg University","ror":"https://ror.org/04m5j1k67","country_code":"DK","type":"education","lineage":["https://openalex.org/I891191580"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"S.D. Sherlekar","raw_affiliation_strings":["Aalborg University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Aalborg University","institution_ids":["https://openalex.org/I891191580"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9783,"has_fulltext":false,"cited_by_count":33,"citation_normalized_percentile":{"value":0.73897067,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"12","issue":"3","first_page":"24","last_page":"24"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.8036414384841919},{"id":"https://openalex.org/keywords/finite-state-machine","display_name":"Finite-state machine","score":0.7125526070594788},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6788856387138367},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.6568394899368286},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.48471713066101074},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.477113276720047},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46764513850212097},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4430786371231079},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.41884711384773254},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3317674398422241},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23312702775001526},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.22510188817977905},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.22133541107177734},{"id":"https://openalex.org/keywords/actuator","display_name":"Actuator","score":0.10905036330223083}],"concepts":[{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.8036414384841919},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.7125526070594788},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6788856387138367},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.6568394899368286},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.48471713066101074},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.477113276720047},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46764513850212097},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4430786371231079},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.41884711384773254},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3317674398422241},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23312702775001526},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.22510188817977905},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.22133541107177734},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.10905036330223083},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/mdt.1995.466370","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.1995.466370","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"},{"id":"pmh:oai:dspace.library.iitb.ac.in:10054/8136","is_oa":false,"landing_page_url":"http://dspace.library.iitb.ac.in/xmlui/handle/10054/8136","pdf_url":null,"source":{"id":"https://openalex.org/S4306400899","display_name":"DSpace (IIT Bombay)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I162827531","host_organization_name":"Indian Institute of Technology Bombay","host_organization_lineage":["https://openalex.org/I162827531"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1489870749","https://openalex.org/W1695883075","https://openalex.org/W1725240622","https://openalex.org/W1836467151","https://openalex.org/W1981514768","https://openalex.org/W2033051696","https://openalex.org/W2036802381","https://openalex.org/W2056137754","https://openalex.org/W2063019582","https://openalex.org/W2096304548","https://openalex.org/W2096466754","https://openalex.org/W2096887278","https://openalex.org/W2135448654","https://openalex.org/W2139397375","https://openalex.org/W2156003834","https://openalex.org/W2164815137","https://openalex.org/W2165341503","https://openalex.org/W2170656697"],"related_works":["https://openalex.org/W2103326719","https://openalex.org/W2535130387","https://openalex.org/W2205347728","https://openalex.org/W2188166871","https://openalex.org/W1531819087","https://openalex.org/W2045651232","https://openalex.org/W2017650358","https://openalex.org/W3013757523","https://openalex.org/W2096532933","https://openalex.org/W2783755876"],"abstract_inverted_index":{"In":[0],"a":[1,30],"monitored":[2,65],"FSM":[3],"controller,":[4],"an":[5],"auxiliary":[6],"monitoring":[7,27],"machine":[8,22,28],"operates":[9],"in":[10,20],"lockstep":[11],"with":[12,51],"the":[13,34,60,64],"main":[14],"FSM,":[15],"so":[16],"that":[17,48],"any":[18],"fault":[19,57],"either":[21],"is":[23,56,68],"immediately":[24],"detected.":[25],"The":[26,44],"provides":[29],"uniform":[31],"mechanism":[32],"for":[33],"detection":[35],"of":[36,63],"stuck-at":[37],"faults":[38],"as":[39,41],"well":[40],"delay":[42],"faults.":[43],"technique":[45],"yields":[46],"designs":[47],"compare":[49],"favorably":[50],"previous":[52],"implementations.":[53],"Not":[54],"only":[55],"coverage":[58],"higher,":[59],"hardware":[61],"cost":[62],"sequential":[66],"circuit":[67],"significantly":[69],"lower.":[70]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-08-26T07:47:46.906454","created_date":"2025-10-10T00:00:00"}
