{"id":"https://openalex.org/W2756182264","doi":"https://doi.org/10.1109/mdat.2017.2750909","title":"KOCL: Power Self- Awareness for Arbitrary FPGA-SoC-Accelerated OpenCL Applications","display_name":"KOCL: Power Self- Awareness for Arbitrary FPGA-SoC-Accelerated OpenCL Applications","publication_year":2017,"publication_date":"2017-09-11","ids":{"openalex":"https://openalex.org/W2756182264","doi":"https://doi.org/10.1109/mdat.2017.2750909","mag":"2756182264"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2017.2750909","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2017.2750909","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101557921","display_name":"James J. Davis","orcid":"https://orcid.org/0000-0002-4910-3188"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"James J. Davis","raw_affiliation_strings":["Imperial College London, London, U.K"],"raw_orcid":"https://orcid.org/0000-0002-4910-3188","affiliations":[{"raw_affiliation_string":"Imperial College London, London, U.K","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042005495","display_name":"Joshua M. Levine","orcid":"https://orcid.org/0000-0002-2918-4056"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Joshua M. Levine","raw_affiliation_strings":["Intel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067488586","display_name":"Edward Stott","orcid":null},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Edward A. Stott","raw_affiliation_strings":["Imperial College London, London, U.K"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Imperial College London, London, U.K","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025451600","display_name":"Eddie Hung","orcid":"https://orcid.org/0000-0001-7670-116X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Eddie Hung","raw_affiliation_strings":["Invionics"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Invionics","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091532722","display_name":"Peter Y. K. Cheung","orcid":"https://orcid.org/0000-0002-8236-1816"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Peter Y. K. Cheung","raw_affiliation_strings":["Imperial College London, London, U.K"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Imperial College London, London, U.K","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029829952","display_name":"George A. Constantinides","orcid":"https://orcid.org/0000-0002-0201-310X"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"George A. Constantinides","raw_affiliation_strings":["Imperial College London, London, U.K"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Imperial College London, London, U.K","institution_ids":["https://openalex.org/I47508984"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4624,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.62966375,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"34","issue":"6","first_page":"36","last_page":"45"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7961136102676392},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6661556363105774},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.553804337978363},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5041815042495728},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4476076662540436},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3783247470855713}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7961136102676392},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6661556363105774},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.553804337978363},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5041815042495728},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4476076662540436},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3783247470855713},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/mdat.2017.2750909","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2017.2750909","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},{"id":"pmh:oai:spiral.imperial.ac.uk:10044/1/50420","is_oa":false,"landing_page_url":"http://hdl.handle.net/10044/1/50420","pdf_url":null,"source":{"id":"https://openalex.org/S4306401396","display_name":"Spiral (Imperial College London)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I47508984","host_organization_name":"Imperial College London","host_organization_lineage":["https://openalex.org/I47508984"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"45","raw_type":"Journal Article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8199999928474426,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G7639885267","display_name":null,"funder_award_id":"EP/K034448/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G774180880","display_name":null,"funder_award_id":"EP/P010040/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"}],"funders":[{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2006312753","https://openalex.org/W2043642623","https://openalex.org/W2043957526","https://openalex.org/W2065549026","https://openalex.org/W2080178269","https://openalex.org/W2091490988","https://openalex.org/W2096424065","https://openalex.org/W2116750875","https://openalex.org/W2128473621","https://openalex.org/W2161571062","https://openalex.org/W2405218842","https://openalex.org/W2516313607","https://openalex.org/W6651700774"],"related_works":["https://openalex.org/W2002703587","https://openalex.org/W3217667592","https://openalex.org/W2980006224","https://openalex.org/W2063534976","https://openalex.org/W2284838239","https://openalex.org/W2616418345","https://openalex.org/W3166559827","https://openalex.org/W2320205417","https://openalex.org/W2809345078","https://openalex.org/W3010492628"],"abstract_inverted_index":{"Being":[0],"aware":[1],"of":[2],"its":[3],"own":[4],"power":[5,13,31],"consumption":[6],"is":[7],"essential":[8],"for":[9,33],"any":[10],"system":[11],"under":[12],"constraints,":[14],"i.e.":[15],"all":[16],"systems":[17],"with":[18],"moderate":[19],"or":[20],"high":[21],"complexity.":[22],"This":[23],"paper":[24],"describes":[25],"a":[26],"tool":[27],"that":[28],"provides":[29],"this":[30],"awareness":[32],"applications":[34],"written":[35],"in":[36],"OpenCL":[37],"and":[38],"implemented":[39],"on":[40],"FPGAs.":[41],"<italic":[42],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[43],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">\u2014Axel":[44],"Jantsch,":[45],"TU":[46],"Wien</i>":[47]},"counts_by_year":[{"year":2018,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}