{"id":"https://openalex.org/W7117783999","doi":"https://doi.org/10.1109/mcsoc67473.2025.00047","title":"Improved Accuracy CMOS Sigmoidal Function Synthesizers","display_name":"Improved Accuracy CMOS Sigmoidal Function Synthesizers","publication_year":2025,"publication_date":"2025-12-15","ids":{"openalex":"https://openalex.org/W7117783999","doi":"https://doi.org/10.1109/mcsoc67473.2025.00047"},"language":null,"primary_location":{"id":"doi:10.1109/mcsoc67473.2025.00047","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mcsoc67473.2025.00047","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE 18th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112294951","display_name":"Cosmin Popa","orcid":null},"institutions":[{"id":"https://openalex.org/I61641377","display_name":"Universitatea Na\u021bional\u0103 de \u0218tiin\u021b\u0103 \u0219i Tehnologie Politehnica Bucure\u0219ti","ror":"https://ror.org/0558j5q12","country_code":"RO","type":"education","lineage":["https://openalex.org/I61641377"]}],"countries":["RO"],"is_corresponding":true,"raw_author_name":"Cosmin Radu Popa","raw_affiliation_strings":["Telecommunications and Information Technology, National University of Science and Technology Politehnica,Faculty of Electronics,Bucharest,Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Telecommunications and Information Technology, National University of Science and Technology Politehnica,Faculty of Electronics,Bucharest,Romania","institution_ids":["https://openalex.org/I61641377"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5112294951"],"corresponding_institution_ids":["https://openalex.org/I61641377"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.60923654,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"239","last_page":"244"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.881600022315979,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.881600022315979,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.03550000116229057,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.021199999377131462,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8118000030517578},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.6572999954223633},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4530999958515167},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.44830000400543213},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4153999984264374},{"id":"https://openalex.org/keywords/semiconductor-device-modeling","display_name":"Semiconductor device modeling","score":0.41519999504089355},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.40059998631477356},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.3553999960422516}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8118000030517578},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6809999942779541},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.6572999954223633},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48330000042915344},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4530999958515167},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.44830000400543213},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4153999984264374},{"id":"https://openalex.org/C4775677","wikidata":"https://www.wikidata.org/wiki/Q7449393","display_name":"Semiconductor device modeling","level":3,"score":0.41519999504089355},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.40059998631477356},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3971000015735626},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.3553999960422516},{"id":"https://openalex.org/C150169584","wikidata":"https://www.wikidata.org/wiki/Q7834319","display_name":"Transistor model","level":4,"score":0.3441999852657318},{"id":"https://openalex.org/C81388566","wikidata":"https://www.wikidata.org/wiki/Q526668","display_name":"Sigmoid function","level":3,"score":0.3400000035762787},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3303999900817871},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.2865000069141388},{"id":"https://openalex.org/C23061349","wikidata":"https://www.wikidata.org/wiki/Q188946","display_name":"Bipolar junction transistor","level":4,"score":0.28630000352859497},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.2858999967575073},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.28380000591278076},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2766000032424927},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.2694000005722046},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.2662999927997589},{"id":"https://openalex.org/C177454536","wikidata":"https://www.wikidata.org/wiki/Q578290","display_name":"Emphasis (telecommunications)","level":2,"score":0.25850000977516174},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.2572000026702881},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.2563999891281128}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mcsoc67473.2025.00047","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mcsoc67473.2025.00047","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE 18th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6171920299530029,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W2489346610","https://openalex.org/W2502623891","https://openalex.org/W2775095918","https://openalex.org/W2991760581","https://openalex.org/W3043805104","https://openalex.org/W3119809190","https://openalex.org/W3156191978","https://openalex.org/W3200687168","https://openalex.org/W3206058553","https://openalex.org/W4361829750","https://openalex.org/W4367360679","https://openalex.org/W4391696982"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"original":[3],"CMOS":[4,47,122],"implementations":[5],"of":[6,35,78,136],"two":[7,36],"function":[8],"synthesizers":[9,65],"designed":[10],"to":[11],"generate":[12],"unipolar":[13,97],"and":[14,44,61,132],"bipolar":[15,103],"sigmoidal":[16],"mathematical":[17],"functions,":[18,39],"which":[19],"are":[20,51],"widely":[21],"applicable":[22],"in":[23,67,90],"analog":[24],"signal":[25],"processing.":[26],"The":[27,64,105],"design":[28],"methodology":[29],"is":[30],"based":[31,117],"on":[32,118],"the":[33,82,96,102,125,130,133,137],"use":[34],"higher-order":[37],"approximation":[38],"selected":[40],"for":[41,46],"their":[42],"accuracy":[43],"suitability":[45],"integration.":[48],"These":[49],"functions":[50],"implemented":[52],"using":[53],"newly":[54],"proposed":[55,138],"fundamental":[56],"computational":[57],"building":[58],"blocks:":[59],"squaring":[60],"multiplier/divider":[62],"circuits.":[63],"operate":[66],"current":[68],"mode,":[69],"enabling":[70],"low-voltage":[71],"functionality":[72,131],"with":[73],"a":[74],"minimum":[75],"supply":[76],"voltage":[77],"0.7":[79],"V.":[80],"Moreover,":[81],"architectures":[83],"support":[84],"extremely":[85],"low":[86],"bias":[87],"currents,":[88],"resulting":[89],"ultra-low":[91],"power":[92],"consumption-$0.2":[93],"\\mu":[94,100,110,112,120],"~\\mathrm{W}$for":[95,101],"synthesizer":[98],"and$0.26":[99],"version.":[104],"silicon":[106],"area":[107],"requirements":[108],"are$8":[109],"~\\mathrm{m}^{2}$and$10":[111],"~\\mathrm{m}^{2}$,":[113],"respectively.":[114],"SPICE":[115],"simulations":[116],"the$0.18":[119],"~\\mathrm{m}$TSMC":[121],"process":[123],"confirm":[124],"theoretical":[126],"predictions,":[127],"validating":[128],"both":[129],"energy":[134],"efficiency":[135],"designs.":[139]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-12-31T00:00:00"}