{"id":"https://openalex.org/W1921064281","doi":"https://doi.org/10.1109/mascot.1996.501019","title":"Issues in reliable network memory paging","display_name":"Issues in reliable network memory paging","publication_year":2002,"publication_date":"2002-12-23","ids":{"openalex":"https://openalex.org/W1921064281","doi":"https://doi.org/10.1109/mascot.1996.501019","mag":"1921064281"},"language":"en","primary_location":{"id":"doi:10.1109/mascot.1996.501019","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mascot.1996.501019","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of MASCOTS '96 - 4th International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006368259","display_name":"Evangelos P. Markatos","orcid":"https://orcid.org/0000-0003-3563-7733"},"institutions":[{"id":"https://openalex.org/I8901234","display_name":"Foundation for Research and Technology Hellas","ror":"https://ror.org/052rphn09","country_code":"GR","type":"facility","lineage":["https://openalex.org/I8901234"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"E.P. Markatos","raw_affiliation_strings":["Computer Architecture and VLSI Systems Group Institute of Computer Science ICS, Foundation for Research and Technology Hellas, Crete, Greece","Comput. Archit. & VLSI Syst. Group, Inst. of Comput. Sci., Crete, Greece"],"affiliations":[{"raw_affiliation_string":"Computer Architecture and VLSI Systems Group Institute of Computer Science ICS, Foundation for Research and Technology Hellas, Crete, Greece","institution_ids":["https://openalex.org/I8901234"]},{"raw_affiliation_string":"Comput. Archit. & VLSI Syst. Group, Inst. of Comput. Sci., Crete, Greece","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5006368259"],"corresponding_institution_ids":["https://openalex.org/I8901234"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.11276281,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"207","last_page":"211"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8690012693405151},{"id":"https://openalex.org/keywords/paging","display_name":"Paging","score":0.8342483043670654},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.5103995203971863},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4907475411891937},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.46181997656822205},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.4559997618198395},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4313179850578308},{"id":"https://openalex.org/keywords/virtual-memory","display_name":"Virtual memory","score":0.42129209637641907},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4043057858943939},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3998590111732483},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.24413606524467468},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2238103151321411},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.13171780109405518}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8690012693405151},{"id":"https://openalex.org/C50954386","wikidata":"https://www.wikidata.org/wiki/Q656083","display_name":"Paging","level":2,"score":0.8342483043670654},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.5103995203971863},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4907475411891937},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.46181997656822205},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.4559997618198395},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4313179850578308},{"id":"https://openalex.org/C76399640","wikidata":"https://www.wikidata.org/wiki/Q189401","display_name":"Virtual memory","level":4,"score":0.42129209637641907},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4043057858943939},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3998590111732483},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.24413606524467468},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2238103151321411},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.13171780109405518},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mascot.1996.501019","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mascot.1996.501019","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of MASCOTS '96 - 4th International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1573783702","https://openalex.org/W1585157973","https://openalex.org/W1981730822","https://openalex.org/W2012643955","https://openalex.org/W2053291274","https://openalex.org/W2077967211","https://openalex.org/W2135131646","https://openalex.org/W2147853062","https://openalex.org/W2168792315","https://openalex.org/W2205436351","https://openalex.org/W6634337025"],"related_works":["https://openalex.org/W1991450610","https://openalex.org/W4243333834","https://openalex.org/W1584503625","https://openalex.org/W2983975822","https://openalex.org/W4312264564","https://openalex.org/W1554378476","https://openalex.org/W1500809736","https://openalex.org/W4248614727","https://openalex.org/W2296275612","https://openalex.org/W4249130715"],"abstract_inverted_index":{"Recent":[0],"distributed":[1],"systems":[2],"are":[3],"connected":[4],"with":[5],"high-performance":[6],"networks":[7],"that":[8,31,56,83],"make":[9,32],"possible":[10],"the":[11,47],"use":[12],"of":[13,17,49,75],"a":[14,51,90],"new":[15],"level":[16],"memory":[18,23,54],"hierarchy:":[19],"network":[20,53],"memory.":[21],"Network":[22],"provides":[24],"both":[25],"high":[26],"bandwidth":[27],"and":[28,39,68],"low":[29],"latency,":[30],"it":[33],"attractive":[34],"for":[35],"uses":[36],"like":[37],"paging":[38],"file":[40],"caching.":[41],"In":[42],"this":[43],"paper":[44],"we":[45],"explore":[46],"issues":[48],"building":[50],"reliable":[52],"system":[55],"is":[57],"resilient":[58],"to":[59],"single":[60],"workstation":[61],"failures.":[62],"We":[63],"propose":[64],"novel":[65],"parity-based":[66],"policies":[67,86],"evaluate":[69],"their":[70],"performance":[71,80],"using":[72],"trace-driven":[73],"simulation":[74],"realistic":[76],"applications.":[77],"The":[78],"presented":[79],"results":[81],"suggest":[82],"our":[84],"proposed":[85],"provide":[87],"reliability":[88],"at":[89],"surprisingly":[91],"small":[92],"run-time":[93],"overhead.":[94]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
