{"id":"https://openalex.org/W2159112907","doi":"https://doi.org/10.1109/latw.2011.5985896","title":"Configurable Thru-Silicon-Via interconnect Built-In Self-Test and diagnosis","display_name":"Configurable Thru-Silicon-Via interconnect Built-In Self-Test and diagnosis","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2159112907","doi":"https://doi.org/10.1109/latw.2011.5985896","mag":"2159112907"},"language":"en","primary_location":{"id":"doi:10.1109/latw.2011.5985896","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2011.5985896","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 12th Latin American Test Workshop (LATW)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064147688","display_name":"Vladimir Pa\u015fca","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Vladimir Pasca","raw_affiliation_strings":["TIMA Laboratory, Grenoble, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TIMA Laboratory, Grenoble, France","institution_ids":["https://openalex.org/I4210087012"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053835664","display_name":"Lorena Anghel","orcid":"https://orcid.org/0000-0001-9569-0072"},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Lorena Anghel","raw_affiliation_strings":["TIMA Laboratory, Grenoble, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TIMA Laboratory, Grenoble, France","institution_ids":["https://openalex.org/I4210087012"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108093269","display_name":"Mounir Benabdenbi","orcid":"https://orcid.org/0000-0001-9586-3009"},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Mounir Benabdenbi","raw_affiliation_strings":["TIMA Laboratory, Grenoble, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TIMA Laboratory, Grenoble, France","institution_ids":["https://openalex.org/I4210087012"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210087012"],"apc_list":null,"apc_paid":null,"fwci":1.3425,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.80890407,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.8670133352279663},{"id":"https://openalex.org/keywords/crosstalk","display_name":"Crosstalk","score":0.7460533380508423},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.6595578193664551},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5528325438499451},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.5011956691741943},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4795674681663513},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.4482470154762268},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4185151755809784},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.4182378649711609},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3871299624443054},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2533862292766571},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.15955767035484314},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11109757423400879}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.8670133352279663},{"id":"https://openalex.org/C169822122","wikidata":"https://www.wikidata.org/wiki/Q230187","display_name":"Crosstalk","level":2,"score":0.7460533380508423},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.6595578193664551},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5528325438499451},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.5011956691741943},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4795674681663513},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4482470154762268},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4185151755809784},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.4182378649711609},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3871299624443054},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2533862292766571},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.15955767035484314},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11109757423400879},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/latw.2011.5985896","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2011.5985896","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 12th Latin American Test Workshop (LATW)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-00651437v1","is_oa":false,"landing_page_url":"https://hal.science/hal-00651437","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Latin America Test Symposium Workshop (LATW'11), Mar 2011, Porto de Galinhas (PE), Brazil. pp.1-6, &#x27E8;10.1109/LATW.2011.5985896&#x27E9;","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W74773133","https://openalex.org/W2017255835","https://openalex.org/W2096691973","https://openalex.org/W2100597370","https://openalex.org/W2103022917","https://openalex.org/W2104386725","https://openalex.org/W2104500469","https://openalex.org/W2124268206","https://openalex.org/W2143502515","https://openalex.org/W2144149750","https://openalex.org/W2150153665","https://openalex.org/W2159247311","https://openalex.org/W2170550019","https://openalex.org/W2399801569","https://openalex.org/W4205976331","https://openalex.org/W4242674290","https://openalex.org/W6603091157","https://openalex.org/W6675893498"],"related_works":["https://openalex.org/W1551902604","https://openalex.org/W2748443500","https://openalex.org/W2989159162","https://openalex.org/W2153201966","https://openalex.org/W2122754719","https://openalex.org/W2139513292","https://openalex.org/W1982569681","https://openalex.org/W776711554","https://openalex.org/W1983191281","https://openalex.org/W1874778078"],"abstract_inverted_index":{"Three-dimensional":[0],"integration":[1],"is":[2,21,116,121],"a":[3,33],"key":[4],"technology":[5,117],"for":[6,40,50],"systems":[7],"whose":[8],"performance":[9],"/":[10],"power":[11],"requirements":[12],"cannot":[13],"be":[14],"achieved":[15],"by":[16,76,153],"traditional":[17],"silicon":[18],"technologies.":[19],"Testing":[20],"one":[22],"of":[23,27,92],"the":[24,64,68,77,80,90,97,125,147,151,166],"major":[25],"challenges":[26],"3D":[28],"integration.":[29],"This":[30],"paper":[31],"proposes":[32],"configurable":[34],"Interconnect":[35],"Built-In":[36],"Self-Test":[37],"(BIST)":[38],"technique":[39,48],"inter-die":[41],"interconnects":[42],"(Thru-Silicon":[43],"Vias":[44],"TSVs).":[45],"The":[46,83,100,112,135],"proposed":[47,65,136],"accounts":[49],"faults":[51,59],"like":[52],"opens":[53],"and":[54,56,119],"shorts":[55],"also":[57],"delay":[58],"due":[60,158],"to":[61,155,159],"crosstalk.":[62],"In":[63],"fault":[66,133],"model,":[67],"signal":[69],"transitions":[70,78],"on":[71,79],"victim":[72,94,107],"TSVs":[73,108],"are":[74,96,103,109,128,169],"affected":[75],"aggressor":[81],"TSVs.":[82],"KthAggressor":[84],"Fault":[85],"model":[86],"(KAF)":[87],"assumes":[88],"that":[89,124],"aggressors":[91],"each":[93],"TSV":[95,162],"K-order":[98],"neighbors.":[99],"test":[101,126],"times":[102,127],"reduced":[104],"as":[105],"more":[106],"concurrently":[110],"tested.":[111],"neighboring":[113],"order":[114],"K":[115],"dependent":[118],"it":[120],"determined":[122],"such":[123],"minimal":[129],"without":[130],"loss":[131],"in":[132],"coverage.":[134],"BIST":[137,144],"has":[138],"lower":[139],"area":[140,152,167],"than":[141],"existing":[142],"interconnect":[143],"solutions,":[145],"while":[146],"configuration":[148],"capabilities":[149],"increase":[150],"up":[154],"80%.":[156],"However,":[157],"relative":[160],"high":[161],"pitch":[163],"(10s":[164],"\u03bcm),":[165],"overheads":[168],"small.":[170]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
