{"id":"https://openalex.org/W2171909224","doi":"https://doi.org/10.1109/jssc.2006.875301","title":"The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks","display_name":"The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks","publication_year":2006,"publication_date":"2006-07-26","ids":{"openalex":"https://openalex.org/W2171909224","doi":"https://doi.org/10.1109/jssc.2006.875301","mag":"2171909224"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2006.875301","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2006.875301","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069727044","display_name":"Timothy O. Dickson","orcid":"https://orcid.org/0000-0002-0361-031X"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"T.O. Dickson","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109869940","display_name":"K.H.K. Yau","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"K.H.K. Yau","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028638715","display_name":"T. Chalvatzis","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"T. Chalvatzis","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059278822","display_name":"A. Mangan","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"A.M. Mangan","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048099763","display_name":"E. Laskin","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"E. Laskin","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063209388","display_name":"R. Beerkens","orcid":null},"institutions":[{"id":"https://openalex.org/I4210109823","display_name":"STMicroelectronics (Canada)","ror":"https://ror.org/01qcf5s69","country_code":"CA","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210109823"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"R. Beerkens","raw_affiliation_strings":["STMicroelectronics, Inc., Ottawa, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Inc., Ottawa, ONT, Canada","institution_ids":["https://openalex.org/I4210109823"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075666964","display_name":"P. Westergaard","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"P. Westergaard","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031233705","display_name":"M. Tazlauanu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Tazlauanu","raw_affiliation_strings":["Quake Technologies, Inc., Ottawa, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Quake Technologies, Inc., Ottawa, ONT, Canada","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085774912","display_name":"Ming\u2010Ta Yang","orcid":"https://orcid.org/0000-0002-4874-3589"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"M.-T. Yang","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079412475","display_name":"Sorin P. Voinigescu","orcid":"https://orcid.org/0000-0001-5134-1970"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"S.P. Voinigescu","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":10,"corresponding_author_ids":["https://openalex.org/A5069727044"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":18.4287,"has_fulltext":false,"cited_by_count":201,"citation_normalized_percentile":{"value":0.99564219,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"41","issue":"8","first_page":"1830","last_page":"1845"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6687463521957397},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5815532803535461},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.5383020639419556},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.5176920890808105},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4896100163459778},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4835643470287323},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.4741503596305847},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4663628339767456},{"id":"https://openalex.org/keywords/transimpedance-amplifier","display_name":"Transimpedance amplifier","score":0.4587891101837158},{"id":"https://openalex.org/keywords/bicmos","display_name":"BiCMOS","score":0.45338523387908936},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.4504837989807129},{"id":"https://openalex.org/keywords/porting","display_name":"Porting","score":0.4221609830856323},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3780674934387207},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.37714922428131104},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3475602865219116},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3043382167816162},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2560115456581116},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.2516990900039673}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6687463521957397},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5815532803535461},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.5383020639419556},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.5176920890808105},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4896100163459778},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4835643470287323},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.4741503596305847},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4663628339767456},{"id":"https://openalex.org/C92631468","wikidata":"https://www.wikidata.org/wiki/Q215437","display_name":"Transimpedance amplifier","level":5,"score":0.4587891101837158},{"id":"https://openalex.org/C62427370","wikidata":"https://www.wikidata.org/wiki/Q173416","display_name":"BiCMOS","level":4,"score":0.45338523387908936},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.4504837989807129},{"id":"https://openalex.org/C106251023","wikidata":"https://www.wikidata.org/wiki/Q851989","display_name":"Porting","level":3,"score":0.4221609830856323},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3780674934387207},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.37714922428131104},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3475602865219116},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3043382167816162},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2560115456581116},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.2516990900039673},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2006.875301","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2006.875301","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W1518556660","https://openalex.org/W1535210846","https://openalex.org/W1544173589","https://openalex.org/W1569638374","https://openalex.org/W1661368752","https://openalex.org/W1831737867","https://openalex.org/W1977390134","https://openalex.org/W1994444741","https://openalex.org/W1996802604","https://openalex.org/W1998639405","https://openalex.org/W2100779054","https://openalex.org/W2108869528","https://openalex.org/W2111289411","https://openalex.org/W2118946652","https://openalex.org/W2124259293","https://openalex.org/W2124848329","https://openalex.org/W2133629759","https://openalex.org/W2136567225","https://openalex.org/W2137359491","https://openalex.org/W2144379323","https://openalex.org/W2144644033","https://openalex.org/W2148498078","https://openalex.org/W2151749367","https://openalex.org/W2152613446","https://openalex.org/W2154869256","https://openalex.org/W2157754281","https://openalex.org/W2160068422","https://openalex.org/W2172244402","https://openalex.org/W2494955277","https://openalex.org/W2761949963","https://openalex.org/W2789011290","https://openalex.org/W3149544324","https://openalex.org/W3210424613","https://openalex.org/W4244915644","https://openalex.org/W4298334616","https://openalex.org/W6679844144","https://openalex.org/W6683652965"],"related_works":["https://openalex.org/W4386261925","https://openalex.org/W2082944690","https://openalex.org/W2263373136","https://openalex.org/W1914349328","https://openalex.org/W2104885411","https://openalex.org/W2023334077","https://openalex.org/W2005494397","https://openalex.org/W2160067645","https://openalex.org/W2339836056","https://openalex.org/W1811213809"],"abstract_inverted_index":{"This":[0,114],"paper":[1,153],"provides":[2],"evidence":[3],"that,":[4],"as":[5,74,124],"a":[6,94,221],"result":[7],"of":[8,42,119,136,151,163,202,230,280],"constant-field":[9],"scaling,":[10],"the":[11,60,68,117,134,152,161,277],"peak":[12,20],"f":[13,21],"<sub":[14,22,34],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[15,23,35],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">T</sub>":[16],"(approx.":[17,26,37],"0.3":[18],"mA/mum),":[19,28],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">MAX":[24],"</sub>":[25],"0.2":[27],"and":[29,44,54,84,109,131,141,172,174,178,184,186,240,244,249,262],"optimum":[30],"noise":[31,260],"figure":[32,261],"NF":[33],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">MIN</sub>":[36],"0.15":[38],"mA/mum)":[39],"current":[40,62,143],"densities":[41,63],"Si":[43],"SOI":[45,192,250],"n-channel":[46],"MOSFETs":[47],"are":[48,200,274],"largely":[49],"unchanged":[50],"over":[51,254],"technology":[52,182],"nodes":[53,183],"foundries.":[55],"It":[56],"is":[57,97,126],"demonstrated":[58],"that":[59,99,155],"characteristic":[61],"also":[64],"remain":[65],"invariant":[66],"for":[67,160,276],"most":[69],"common":[70],"circuit":[71,112,146],"topologies":[72],"such":[73,206],"MOSFET":[75,107],"cascodes,":[76,79],"MOS-SiGe":[77],"HBT":[78],"current-mode":[80],"logic":[81,176,226],"(CML)":[82],"gates,":[83],"nMOS":[85],"transimpedance":[86],"amplifiers":[87,212],"(TIAs)":[88],"with":[89,194,213,238,253],"active":[90],"pMOSFET":[91],"loads.":[92],"As":[93],"consequence,":[95],"it":[96],"proposed":[98],"constant":[100,156],"current-density":[101,157],"biasing":[102,158],"schemes":[103],"be":[104],"applied":[105],"to":[106,191,215,268],"analog/mixed-signal/RF":[108],"high-speed":[110,225],"digital":[111],"design.":[113],"will":[115,132],"alleviate":[116],"problem":[118],"ever-diminishing":[120],"effective":[121],"gate":[122],"voltages":[123],"CMOS":[125,170,190,251],"scaled":[127],"below":[128],"90":[129],"nm,":[130],"reduce":[133],"impact":[135],"statistical":[137],"process":[138],"variation,":[139],"temperature":[140],"bias":[142],"variation":[144],"on":[145],"performance.":[147],"The":[148],"second":[149],"half":[150],"illustrates":[154],"allows":[159],"porting":[162],"SiGe":[164,209,223],"BiCMOS":[165,210,224],"cascode":[166],"operational":[167,211],"amplifiers,":[168],"low-noise":[169],"TIAs,":[171,234],"MOS-CML":[173],"BiCMOS-CML":[175],"gates":[177],"output":[179,236,241],"drivers":[180],"between":[181],"foundries,":[185],"even":[187],"from":[188],"bulk":[189,248],"processes,":[193],"little":[195],"or":[196],"no":[197],"redesign.":[198],"Examples":[199],"provided":[201],"several":[203],"record-setting":[204],"circuits":[205],"as:":[207],"1)":[208],"up":[214,267],"37-GHz":[216],"unity":[217],"gain":[218],"bandwidth;":[219],"2)":[220],"2.5-V":[222],"chip":[227],"set":[228],"consisting":[229],"49-GHz":[231],"retimer,":[232],"40-GHz":[233],"80-GHz":[235],"driver":[237],"pre-emphasis":[239],"swing":[242],"control;":[243],"3)":[245],"1-V":[246],"90-nm":[247],"TIAs":[252],"26-GHz":[255],"bandwidth,":[256],"less":[257],"than":[258],"8-dB":[259],"operating":[263],"at":[264],"data":[265],"rates":[266],"38.8":[269],"Gb/s.":[270],"Such":[271],"building":[272],"blocks":[273],"required":[275],"next":[278],"generation":[279],"low-power":[281],"40-80":[282],"Gb/s":[283],"wireline":[284],"transceivers":[285]},"counts_by_year":[{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":11},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":9},{"year":2016,"cited_by_count":11},{"year":2015,"cited_by_count":13},{"year":2014,"cited_by_count":15},{"year":2013,"cited_by_count":15},{"year":2012,"cited_by_count":15}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
