{"id":"https://openalex.org/W4415821739","doi":"https://doi.org/10.1109/itc58126.2025.00038","title":"SMART: Scalable and Modular Architecture for Routing-Aware Testing of Fan-out Wafer-Level Packages <sup>*</sup>","display_name":"SMART: Scalable and Modular Architecture for Routing-Aware Testing of Fan-out Wafer-Level Packages <sup>*</sup>","publication_year":2025,"publication_date":"2025-09-20","ids":{"openalex":"https://openalex.org/W4415821739","doi":"https://doi.org/10.1109/itc58126.2025.00038"},"language":null,"primary_location":{"id":"doi:10.1109/itc58126.2025.00038","is_oa":false,"landing_page_url":"https://doi.org/10.1109/itc58126.2025.00038","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Test Conference (ITC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5098932933","display_name":"Partho Bhoumik","orcid":null},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Partho Bhoumik","raw_affiliation_strings":["Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ"],"affiliations":[{"raw_affiliation_string":"Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5093558784","display_name":"Dhruv Thapar","orcid":"https://orcid.org/0009-0001-1050-0960"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dhruv Thapar","raw_affiliation_strings":["Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ"],"affiliations":[{"raw_affiliation_string":"Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090354528","display_name":"Arjun Chaudhuri","orcid":"https://orcid.org/0000-0001-9353-6397"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arjun Chaudhuri","raw_affiliation_strings":["Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ"],"affiliations":[{"raw_affiliation_string":"Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033880864","display_name":"Krishnendu Chakrabarty","orcid":"https://orcid.org/0000-0003-4475-6435"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Krishnendu Chakrabarty","raw_affiliation_strings":["Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ"],"affiliations":[{"raw_affiliation_string":"Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ","institution_ids":["https://openalex.org/I55732556"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5098932933"],"corresponding_institution_ids":["https://openalex.org/I55732556"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.31226407,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"310","last_page":"319"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.7170000076293945,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.7170000076293945,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.07720000296831131,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10460","display_name":"Electronic Packaging and Soldering Technologies","score":0.05829999968409538,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5734999775886536},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5436999797821045},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.48570001125335693},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.38510000705718994},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.34150001406669617},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.3411000072956085},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.3402000069618225},{"id":"https://openalex.org/keywords/system-testing","display_name":"System testing","score":0.3379000127315521},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.336899995803833}],"concepts":[{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5734999775886536},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5436999797821045},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.48570001125335693},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.46810001134872437},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45890000462532043},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4239000082015991},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.38510000705718994},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.34150001406669617},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.3411000072956085},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.3402000069618225},{"id":"https://openalex.org/C7166840","wikidata":"https://www.wikidata.org/wiki/Q1199682","display_name":"System testing","level":2,"score":0.3379000127315521},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.336899995803833},{"id":"https://openalex.org/C131584629","wikidata":"https://www.wikidata.org/wiki/Q4308705","display_name":"Coupling (piping)","level":2,"score":0.3343000113964081},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.32440000772476196},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.32429999113082886},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.31929999589920044},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.31459999084472656},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.31369999051094055},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.296099990606308},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.28769999742507935},{"id":"https://openalex.org/C107683887","wikidata":"https://www.wikidata.org/wiki/Q782466","display_name":"Integration testing","level":3,"score":0.2856999933719635},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.27900001406669617},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.2770000100135803},{"id":"https://openalex.org/C186260285","wikidata":"https://www.wikidata.org/wiki/Q759494","display_name":"Integrated circuit packaging","level":3,"score":0.2768000066280365},{"id":"https://openalex.org/C21792228","wikidata":"https://www.wikidata.org/wiki/Q5178039","display_name":"Coupling loss","level":3,"score":0.27630001306533813},{"id":"https://openalex.org/C141842801","wikidata":"https://www.wikidata.org/wiki/Q363815","display_name":"Automatic test equipment","level":3,"score":0.2750999927520752},{"id":"https://openalex.org/C115051666","wikidata":"https://www.wikidata.org/wiki/Q6522493","display_name":"Ranging","level":2,"score":0.2734000086784363},{"id":"https://openalex.org/C138055206","wikidata":"https://www.wikidata.org/wiki/Q1319010","display_name":"Electromigration","level":2,"score":0.2653999924659729},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.2529999911785126}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/itc58126.2025.00038","is_oa":false,"landing_page_url":"https://doi.org/10.1109/itc58126.2025.00038","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Test Conference (ITC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320332178","display_name":"National Institute of Standards and Technology","ror":"https://ror.org/05xpvk416"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W2049057658","https://openalex.org/W2111902220","https://openalex.org/W2113513143","https://openalex.org/W2145515320","https://openalex.org/W2161455936","https://openalex.org/W2499596257","https://openalex.org/W2512435509","https://openalex.org/W2532227279","https://openalex.org/W2625666888","https://openalex.org/W2886394361","https://openalex.org/W2918908818","https://openalex.org/W3016874508","https://openalex.org/W3045798073","https://openalex.org/W3118973667","https://openalex.org/W3184009978","https://openalex.org/W3187685373","https://openalex.org/W3191619687","https://openalex.org/W3191791854","https://openalex.org/W3210642049","https://openalex.org/W4200370795","https://openalex.org/W4282983237","https://openalex.org/W4317382480","https://openalex.org/W4384026290","https://openalex.org/W4385192436","https://openalex.org/W4400034200","https://openalex.org/W4400034749","https://openalex.org/W4402742838","https://openalex.org/W4410553025","https://openalex.org/W4411173513"],"related_works":[],"abstract_inverted_index":{"Fan-out":[0],"wafer-level":[1],"packaging":[2],"enables":[3],"heterogeneous":[4],"chiplet":[5],"integration":[6],"via":[7],"Cu":[8],"pillars":[9],"and":[10,41,62,97,110,119,126,169],"redistribution":[11],"layers":[12],"(RDLs).":[13],"As":[14],"FOWLP":[15],"technology":[16],"evolves,":[17],"the":[18,68,88],"focus":[19],"is":[20,136],"shifting":[21],"towards":[22],"many-chiplet":[23,140],"designs,":[24],"necessitating":[25],"multi-layer":[26,50,89],"RDL":[27,47,90],"structures":[28],"to":[29,56,76,93,122],"route":[30],"interconnects":[31,103],"between":[32],"these":[33,53],"chiplets.":[34],"However,":[35],"defects":[36],"such":[37],"as":[38],"opens,":[39],"shorts,":[40],"coupling":[42,98],"are":[43],"a":[44,82],"challenge":[45],"for":[46,115],"structures.":[48],"High-density,":[49],"RDLs":[51,72],"exacerbate":[52],"challenges,":[54],"leading":[55],"intensified":[57],"coupling,":[58],"elevated":[59],"switching":[60],"activity,":[61],"shorts":[63,96],"within":[64],"metal":[65],"segments.":[66],"Moreover,":[67],"finer":[69],"pitch":[70],"of":[71,146],"increases":[73],"electromigration":[74],"due":[75],"rising":[77],"current":[78],"densities.":[79],"We":[80],"propose":[81],"routing-aware":[83],"testing":[84],"framework":[85],"that":[86,152],"leverages":[87],"routing":[91],"Information":[92],"target":[94],"realistic":[95],"defects.":[99],"By":[100],"physically":[101],"partitioning":[102,175],"into":[104],"regions,":[105],"we":[106],"enable":[107],"test":[108,117,124,167,170],"scheduling":[109],"leverage":[111],"shared":[112],"test-pattern":[113],"generators":[114],"launching":[116],"patterns":[118],"capturing":[120],"responses":[121],"reduce":[123],"time":[125,171],"area":[127,168],"overhead":[128],"without":[129],"compromising":[130],"fault":[131,160],"coverage.":[132],"The":[133],"framework\u2019s":[134],"effectiveness":[135],"demonstrated":[137],"on":[138],"four":[139],"package":[141],"designs":[142],"with":[143,162],"varying":[144],"configurations":[145],"chiplet-to-chiplet":[147],"connectivity.":[148],"Our":[149],"results":[150],"show":[151],"this":[153],"method":[154],"can":[155],"achieve":[156],"over":[157],"99.8":[158],"%":[159],"coverage":[161],"an":[163,173],"n-fold":[164],"reduction":[165],"in":[166],"through":[172],"n-way":[174],"strategy.":[176]},"counts_by_year":[],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2025-11-03T00:00:00"}