{"id":"https://openalex.org/W1602687461","doi":"https://doi.org/10.1109/isvdat.2015.7208160","title":"Network-on-chip: Current issues and challenges","display_name":"Network-on-chip: Current issues and challenges","publication_year":2015,"publication_date":"2015-06-01","ids":{"openalex":"https://openalex.org/W1602687461","doi":"https://doi.org/10.1109/isvdat.2015.7208160","mag":"1602687461"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2015.7208160","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2015.7208160","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 19th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028420263","display_name":"Manoj Singh Gaur","orcid":"https://orcid.org/0000-0002-0497-721X"},"institutions":[{"id":"https://openalex.org/I83205935","display_name":"Malaviya National Institute of Technology Jaipur","ror":"https://ror.org/0077k1j32","country_code":"IN","type":"education","lineage":["https://openalex.org/I83205935"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Manoj Singh Gaur","raw_affiliation_strings":["Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","Computer Engineering, Malaviya National Institute of Technology MNIT, Jaipur, India"],"affiliations":[{"raw_affiliation_string":"Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","institution_ids":["https://openalex.org/I83205935"]},{"raw_affiliation_string":"Computer Engineering, Malaviya National Institute of Technology MNIT, Jaipur, India","institution_ids":["https://openalex.org/I83205935"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087820056","display_name":"Vijay Laxmi","orcid":"https://orcid.org/0000-0002-3662-8487"},"institutions":[{"id":"https://openalex.org/I83205935","display_name":"Malaviya National Institute of Technology Jaipur","ror":"https://ror.org/0077k1j32","country_code":"IN","type":"education","lineage":["https://openalex.org/I83205935"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vijay Laxmi","raw_affiliation_strings":["Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","Computer Engineering, Malaviya National Institute of Technology MNIT, Jaipur, India"],"affiliations":[{"raw_affiliation_string":"Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","institution_ids":["https://openalex.org/I83205935"]},{"raw_affiliation_string":"Computer Engineering, Malaviya National Institute of Technology MNIT, Jaipur, India","institution_ids":["https://openalex.org/I83205935"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077466475","display_name":"Mark Zwoli\u0144ski","orcid":"https://orcid.org/0000-0002-2230-625X"},"institutions":[{"id":"https://openalex.org/I43439940","display_name":"University of Southampton","ror":"https://ror.org/01ryk1543","country_code":"GB","type":"education","lineage":["https://openalex.org/I43439940"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Mark Zwolinski","raw_affiliation_strings":["University of Southampton, Southampton, Hampshire, GB","Electronic Systems Design Group University of Southampton, High field, Southampton SO17 1BJ"],"affiliations":[{"raw_affiliation_string":"University of Southampton, Southampton, Hampshire, GB","institution_ids":["https://openalex.org/I43439940"]},{"raw_affiliation_string":"Electronic Systems Design Group University of Southampton, High field, Southampton SO17 1BJ","institution_ids":["https://openalex.org/I43439940"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043517428","display_name":"Manoj Kumar","orcid":"https://orcid.org/0000-0002-1847-1797"},"institutions":[{"id":"https://openalex.org/I83205935","display_name":"Malaviya National Institute of Technology Jaipur","ror":"https://ror.org/0077k1j32","country_code":"IN","type":"education","lineage":["https://openalex.org/I83205935"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manoj Kumar","raw_affiliation_strings":["Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","[Malaviya National Institute of Technology (MNIT), Jaipur, India]"],"affiliations":[{"raw_affiliation_string":"Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","institution_ids":["https://openalex.org/I83205935"]},{"raw_affiliation_string":"[Malaviya National Institute of Technology (MNIT), Jaipur, India]","institution_ids":["https://openalex.org/I83205935"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049389910","display_name":"Niyati Gupta","orcid":null},"institutions":[{"id":"https://openalex.org/I83205935","display_name":"Malaviya National Institute of Technology Jaipur","ror":"https://ror.org/0077k1j32","country_code":"IN","type":"education","lineage":["https://openalex.org/I83205935"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Niyati Gupta","raw_affiliation_strings":["Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","[Malaviya National Institute of Technology (MNIT), Jaipur, India]"],"affiliations":[{"raw_affiliation_string":"Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","institution_ids":["https://openalex.org/I83205935"]},{"raw_affiliation_string":"[Malaviya National Institute of Technology (MNIT), Jaipur, India]","institution_ids":["https://openalex.org/I83205935"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013308280","display_name":"Ashish","orcid":"https://orcid.org/0000-0002-7046-8173"},"institutions":[{"id":"https://openalex.org/I83205935","display_name":"Malaviya National Institute of Technology Jaipur","ror":"https://ror.org/0077k1j32","country_code":"IN","type":"education","lineage":["https://openalex.org/I83205935"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ashish","raw_affiliation_strings":["Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","[Malaviya National Institute of Technology (MNIT), Jaipur, India]"],"affiliations":[{"raw_affiliation_string":"Malaviya National Institute of Technology, Jaipur, Rajasthan, IN","institution_ids":["https://openalex.org/I83205935"]},{"raw_affiliation_string":"[Malaviya National Institute of Technology (MNIT), Jaipur, India]","institution_ids":["https://openalex.org/I83205935"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5028420263"],"corresponding_institution_ids":["https://openalex.org/I83205935"],"apc_list":null,"apc_paid":null,"fwci":2.9954,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.91772952,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9950000047683716,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7601159811019897},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6999140381813049},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.6856235265731812},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5530359745025635},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.5197798609733582},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5121869444847107},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5104938745498657},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5007607936859131},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4764707088470459},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4436300992965698},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.42259445786476135},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4012828767299652},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39394113421440125},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33398544788360596},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.27764949202537537},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.22328639030456543}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7601159811019897},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6999140381813049},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.6856235265731812},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5530359745025635},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.5197798609733582},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5121869444847107},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5104938745498657},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5007607936859131},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4764707088470459},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4436300992965698},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.42259445786476135},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4012828767299652},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39394113421440125},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33398544788360596},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.27764949202537537},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.22328639030456543},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isvdat.2015.7208160","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2015.7208160","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 19th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"},{"id":"pmh:oai:eprints.soton.ac.uk:479379","is_oa":false,"landing_page_url":"https://eprints.soton.ac.uk/479379/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401019","display_name":"ePrints Soton (University of Southampton)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I43439940","host_organization_name":"University of Southampton","host_organization_lineage":["https://openalex.org/I43439940"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Conference or Workshop Item"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.6000000238418579}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1939228150","https://openalex.org/W2017503457","https://openalex.org/W2074641282","https://openalex.org/W2104528765","https://openalex.org/W2159747318","https://openalex.org/W2162924393","https://openalex.org/W2255788751","https://openalex.org/W2547377011","https://openalex.org/W3169463464"],"related_works":["https://openalex.org/W1972937569","https://openalex.org/W2359612905","https://openalex.org/W2802000047","https://openalex.org/W2017236304","https://openalex.org/W1995460436","https://openalex.org/W4286571978","https://openalex.org/W2592055189","https://openalex.org/W1499890874","https://openalex.org/W196928559","https://openalex.org/W4238191684"],"abstract_inverted_index":{"Due":[0],"to":[1,39,57,64,78,90,155,175,213,222,302,363,458,478,497,521,545,573,591],"the":[2,6,22,27,103,113,144,157,206,254,285,296,330,336,355,419,437,474,491,575,580,593,597,643],"shrinking":[3],"transistor":[4],"sizes,":[5],"density":[7,83],"of":[8,47,51,68,115,123,146,244,246,259,329,342,358,376,400,412,421,439,493,501,512,600],"ICs":[9],"roughly":[10],"doubles":[11],"every":[12,609],"year":[13],"as":[14,112,151,171,379],"predicted":[15],"by":[16,335],"Moore's":[17],"law.":[18],"These":[19],"advancements":[20,472],"in":[21,98,130,188,242,409,415,548,563,571,627],"VLSI":[23],"integration":[24,471],"densities":[25],"towards":[26,642],"nano":[28],"scale":[29],"era,":[30],"witnessed":[31],"a":[32,85,124,162,172,219,554,587],"paradigm":[33,557],"shift":[34],"from":[35,102,504],"computation":[36],"centric":[37,41],"designs":[38,42],"communication":[40,75,80,149,158,224,344],"incorporating":[43],"very":[44,240],"large":[45],"number":[46,67,114],"simple":[48],"cores.":[49,69],"Plenty":[50],"traditional":[52,152,176,207],"interconnect":[53,65],"schemes":[54],"like":[55,134],"point":[56,77,79],"point,":[58],"buses":[59,95],"and":[60,73,105,120,138,164,195,234,248,261,277,306,324,347,349,385,406,450,578,603],"crossbars":[61],"are":[62,96,201,239,333,354,606,620],"available":[63],"small":[66],"While":[70],"achieving":[71],"fast":[72],"efficient":[74,148,241],"with":[76,109,267,387],"schemes,":[81],"wire":[82],"is":[84,295,418,553,589],"barrier":[86],"for":[87,180,205,427,468,535,636],"adapting":[88],"them":[89],"many":[91,131,214,250,564,621],"core":[92,132],"architectures.":[93],"Moreover,":[94],"simpler":[97],"design,":[99],"they":[100,227],"suffer":[101],"scalability":[104],"arbitration":[106],"issues":[107],"along":[108],"bandwidth":[110,230],"bottleneck":[111],"cores":[116],"increases.":[117],"Similarly":[118],"area":[119,235],"power":[121,233,350],"requirements":[122],"crossbar":[125],"limits":[126],"its":[127,303],"applicability.":[128],"Hence,":[129],"architectures":[133,179],"Chip":[135],"Multiprocessors":[136],"(CMP)":[137],"Multi":[139],"processor":[140,198],"System-on-Chip":[141],"(MPSoCs),":[142],"emerge":[143],"need":[145],"an":[147,202,311,498],"infrastructure":[150],"solutions":[153,511],"fails":[154],"handle":[156,546],"challenges.":[159],"Network-on-Chip":[160],"(NoC),":[161],"scalable":[163,220,229],"modular":[165],"design":[166,374],"approach,":[167],"has":[168,184,559,568,614],"been":[169,186,560,569],"proposed":[170],"promising":[173],"alternative":[174,204],"bus":[177],"based":[178],"inter-core":[181],"communication.":[182],"NoC":[183,319,364,377,416,637],"also":[185,640],"accepted":[187],"industy":[189],"(Tilera's":[190],"TILE-Gx72,":[191],"TILE64TM":[192],"[1]":[193],"processors":[194],"Intel's":[196],"terascale":[197],"[2].":[199],"NoCs":[200,217,238],"attractive":[203],"shared-buses":[208],"or":[209],"dedicated":[210],"wires":[211],"due":[212,301,520],"reasons.":[215],"First,":[216],"represent":[218,596],"solution":[221],"on-chip":[223,265,290],"paradigm,":[225],"because":[226],"provide":[228,641],"at":[231],"low":[232],"overheads.":[236],"Second,":[237],"terms":[243],"use":[245,420],"wiring":[247],"multiplexing":[249],"traffic":[251,577],"flows":[252],"on":[253,310,318,633],"same":[255],"channels":[256],"providing":[257],"quality":[258,341],"service":[260],"higher":[262],"bandwidth.":[263],"Finally,":[264],"networks":[266],"regular":[268,280,505,513],"topologies":[269,502],"have":[270],"short":[271],"interconnects":[272],"that":[273,558,595],"can":[274,455],"be":[275,456],"optimized":[276],"reused":[278],"using":[279],"iterative":[281],"blocks,":[282],"thus":[283],"making":[284],"verification":[286],"process":[287],"easy.":[288],"For":[289],"networks,":[291],"two-dimensional":[292],"(2D)":[293],"mesh":[294,538],"most":[297],"preferred":[298],"topology":[299],"choice":[300],"regularity,":[304],"scalability,":[305],"perfect":[307],"physical":[308],"layout":[309],"actual":[312],"chip.":[313],"This":[314],"tutorial":[315],"shall":[316,639],"focus":[317],"routing":[320,337,384,402,417,432,530,581],"algorithms,":[321],"their":[322],"implementations":[323],"issues.":[325],"The":[326,352,566],"main":[327,356],"parameters":[328,375],"network":[331,576,616],"which":[332,623],"affected":[334],"algorithm":[338],"include":[339],"fault-tolerance,":[340],"service,":[343],"performance":[345,617],"(throughput":[346],"latency)":[348],"consumption.":[351],"following":[353],"objective":[357],"this":[359,367,395,442,509,525,628],"tutorial:":[360],"\u2022":[361,390,404,465,542,630],"Introduction":[362],"[3]:":[365],"In":[366,394,441,524],"part,":[368,396],"we":[369,397,444,527,624],"briefly":[370],"discuss":[371,445,528,626],"about":[372],"various":[373,401,446],"such":[378],"topology,":[380],"switching,":[381],"flow":[382],"control,":[383],"comparison":[386],"existing":[388],"mechanisms.":[389],"Routing":[391,466],"Taxonomy":[392],"[4]:":[393],"present":[398],"classification":[399],"algorithms.":[403],"Deadlock":[405],"Livelock":[407],"freedom":[408,429],"Routing:":[410,549],"One":[411],"current":[413],"issue":[414],"acyclic":[422],"channel":[423],"dependency":[424],"graph":[425],"(ACDG)":[426],"deadlock":[428,463],"prohibiting":[430],"certain":[431],"turns.":[433],"Thus,":[434],"ACDG":[435],"reduces":[436],"degree":[438],"adaptiveness.":[440],"section,":[443,526],"turn":[447,453],"models":[448],"[5]":[449],"how":[451],"these":[452,487,604],"model":[454],"improved":[457,615],"increase":[459],"adaptivity":[460],"while":[461],"maintaining":[462],"freedom.":[464],"Implementations":[467],"NoC:":[469],"Denser":[470],"make":[473,579],"chip":[475],"more":[476],"prone":[477],"failures":[479,488],"(deep":[480],"sub-micron":[481],"effects,":[482],"manufacturing":[483],"effects":[484],"etc).":[485],"Furthermore":[486],"may":[489,516],"disrupt":[490],"regularity":[492],"2D":[494,506,514,537],"meshes,":[495],"leading":[496],"irregular":[499,522,536],"set":[500],"generated":[503],"meshes.":[507],"Under":[508],"condition,":[510],"meshes":[515],"no":[517],"longer":[518],"work":[519],"topology.":[523],"state-of-art":[529],"implementation":[531],"techniques":[532],"[6]-[8]":[533],"used":[534,570,590],"under":[539],"different":[540],"failures.":[541],"Learning":[543,551],"methods":[544],"congestion":[547,598],"Reinforcement":[550],"(RL)":[552],"machine":[555],"learning":[556],"widely":[561],"applied":[562],"areas.":[565],"Q-Learning":[567,613],"NOC":[572],"learn":[574],"decisions":[582],"accordingly.":[583],"At":[584],"each":[585,601],"node,":[586],"table":[588],"store":[592],"values":[594,605],"level":[599],"link":[602],"updated":[607],"after":[608],"packet":[610],"transfer.":[611],"Although,":[612],"but":[618],"there":[619],"challenges":[622],"would":[625],"section":[629],"Brief":[631],"hands":[632],"tool":[634],"chain":[635],"simulation":[638],"end.":[644]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}