{"id":"https://openalex.org/W2039236724","doi":"https://doi.org/10.1109/isvdat.2014.6881053","title":"Design and modeling of high-Q variable width and spacing, planar and 3-D stacked spiral inductors","display_name":"Design and modeling of high-Q variable width and spacing, planar and 3-D stacked spiral inductors","publication_year":2014,"publication_date":"2014-07-01","ids":{"openalex":"https://openalex.org/W2039236724","doi":"https://doi.org/10.1109/isvdat.2014.6881053","mag":"2039236724"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2014.6881053","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2014.6881053","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055686651","display_name":"R. Manikandan","orcid":null},"institutions":[{"id":"https://openalex.org/I59270414","display_name":"Indian Institute of Science Bangalore","ror":"https://ror.org/04dese585","country_code":"IN","type":"education","lineage":["https://openalex.org/I59270414"]},{"id":"https://openalex.org/I4210142761","display_name":"Osys Technology","ror":"https://ror.org/04zhxxe39","country_code":"GB","type":"other","lineage":["https://openalex.org/I4210142761"]}],"countries":["GB","IN"],"is_corresponding":true,"raw_author_name":"R. R. Manikandan","raw_affiliation_strings":["Synopsys, UK","Indian Institute of Science Bangalore, Bengaluru, India"],"affiliations":[{"raw_affiliation_string":"Synopsys, UK","institution_ids":["https://openalex.org/I4210142761"]},{"raw_affiliation_string":"Indian Institute of Science Bangalore, Bengaluru, India","institution_ids":["https://openalex.org/I59270414"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026534776","display_name":"Venkata Narayana Rao Vanukuru","orcid":"https://orcid.org/0000-0001-7183-5513"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Venkata Narayana Rao Vanukuru","raw_affiliation_strings":["IBM (United States), Armonk, United States"],"affiliations":[{"raw_affiliation_string":"IBM (United States), Armonk, United States","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013987317","display_name":"Anjan Chakravorty","orcid":"https://orcid.org/0000-0002-5253-8975"},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anjan Chakravorty","raw_affiliation_strings":["Indian Institute of Technology Madras, Chennai, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Madras, Chennai, India","institution_ids":["https://openalex.org/I24676775"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091221053","display_name":"Bharadwaj Amrutur","orcid":"https://orcid.org/0009-0007-5062-6174"},"institutions":[{"id":"https://openalex.org/I59270414","display_name":"Indian Institute of Science Bangalore","ror":"https://ror.org/04dese585","country_code":"IN","type":"education","lineage":["https://openalex.org/I59270414"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Bharadwaj Amrutur","raw_affiliation_strings":["Indian Institute of Science Bangalore, Bengaluru, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Science Bangalore, Bengaluru, India","institution_ids":["https://openalex.org/I59270414"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5055686651"],"corresponding_institution_ids":["https://openalex.org/I4210142761","https://openalex.org/I59270414"],"apc_list":null,"apc_paid":null,"fwci":1.2559,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.8241457,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11248","display_name":"Advanced Power Amplifier Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10099","display_name":"GaN-based semiconductor devices and materials","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/3104","display_name":"Condensed Matter Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inductor","display_name":"Inductor","score":0.8694838285446167},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.5199957489967346},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4964359402656555},{"id":"https://openalex.org/keywords/planar","display_name":"Planar","score":0.4651089310646057},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.4403296709060669},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.43478259444236755},{"id":"https://openalex.org/keywords/q-factor","display_name":"Q factor","score":0.41219162940979004},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.357536643743515},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.34049785137176514},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.33720481395721436},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3080207109451294},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.30605554580688477}],"concepts":[{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.8694838285446167},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.5199957489967346},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4964359402656555},{"id":"https://openalex.org/C134786449","wikidata":"https://www.wikidata.org/wiki/Q3391255","display_name":"Planar","level":2,"score":0.4651089310646057},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.4403296709060669},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.43478259444236755},{"id":"https://openalex.org/C187725362","wikidata":"https://www.wikidata.org/wiki/Q830521","display_name":"Q factor","level":3,"score":0.41219162940979004},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.357536643743515},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.34049785137176514},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.33720481395721436},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3080207109451294},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.30605554580688477},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.0},{"id":"https://openalex.org/C97126364","wikidata":"https://www.wikidata.org/wiki/Q349669","display_name":"Resonator","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvdat.2014.6881053","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2014.6881053","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1751330828","https://openalex.org/W1978040806","https://openalex.org/W2056693201","https://openalex.org/W2072164748","https://openalex.org/W2082211203","https://openalex.org/W2082739159","https://openalex.org/W2097941400","https://openalex.org/W2115249085","https://openalex.org/W2128128047","https://openalex.org/W2128660367","https://openalex.org/W2130693213","https://openalex.org/W2142219173","https://openalex.org/W2144663849","https://openalex.org/W2147451535","https://openalex.org/W2155378893","https://openalex.org/W2533754011","https://openalex.org/W2567225061","https://openalex.org/W2573158433","https://openalex.org/W3217269181"],"related_works":["https://openalex.org/W4210282947","https://openalex.org/W2093931418","https://openalex.org/W2099415942","https://openalex.org/W2161529159","https://openalex.org/W2012119660","https://openalex.org/W3193669413","https://openalex.org/W2137618459","https://openalex.org/W2129137755","https://openalex.org/W1521365170","https://openalex.org/W2785707288"],"abstract_inverted_index":{"Layout":[0],"optimized":[1,68,82,147],"planar":[2],"spiral":[3],"inductors":[4,85],"using":[5,61,157],"variable":[6,42,53,110],"width":[7],"(W)":[8],"and":[9,37,80,118,125,162],"spacing":[10],"(S)":[11],"across":[12,44,134],"their":[13,45],"turns":[14],"are":[15,57,86],"known":[16],"to":[17,128,165],"exhibit":[18,166],"higher":[19],"quality":[20,73,104],"factors":[21],"(Q).":[22],"In":[23],"this":[24],"paper,":[25],"we":[26],"explore":[27],"the":[28,50,107,130,135],"performance":[29],"improvement":[30,102],"of":[31,67,175],"3-dimensional,":[32],"series-stacked,":[33],"parallel-stacked,":[34],"single":[35],"ended,":[36],"symmetric":[38],"inductor":[39,55,69,112,121,137],"configurations":[40],"with":[41,71,145,172],"W&S":[43,54,111],"turns.":[46],"Parameterized":[47],"cells":[48],"for":[49,64,106],"aforementioned":[51],"complex":[52],"structures":[56],"developed":[58,124,159],"in":[59,88,103],"cadence":[60],"SKILL":[62],"scripts":[63],"automatic":[65],"generation":[66],"layouts":[70],"improved":[72,131,168],"factors.":[74],"The":[75],"analyzed":[76,136],"standard":[77],"(constant":[78],"W&S)":[79,84],"layout":[81,146],"(variable":[83],"fabricated":[87],"a":[89],"0.18":[90],"\u03bcm":[91],"silicon":[92],"on":[93],"insulator":[94],"process.":[95],"Measurement":[96],"results":[97],"show":[98],"more":[99],"than":[100],"20%":[101],"factor":[105],"3-D":[108],"stacked":[109],"topologies.":[113,138],"Furthermore,":[114],"an":[115,167],"accurate,":[116],"scalable,":[117],"broadband":[119],"compact":[120,160],"model":[122],"was":[123,155],"is":[126,163],"shown":[127,164],"capture":[129],"Q":[132],"characteristics":[133,171],"A":[139],"complementary":[140],"LC-tank":[141],"voltage":[142],"controlled":[143],"oscillator":[144],"inductors,":[148],"operating":[149],"over":[150],"2.4-2.5":[151],"GHz":[152],"frequency":[153],"range":[154],"simulated":[156],"these":[158],"models":[161],"phase":[169],"noise":[170],"better":[173],"figure":[174],"merit.":[176]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}