{"id":"https://openalex.org/W2134899507","doi":"https://doi.org/10.1109/isvdat.2014.6881046","title":"Automatic real-time extraction of focused regions in a live video stream using edge width information","display_name":"Automatic real-time extraction of focused regions in a live video stream using edge width information","publication_year":2014,"publication_date":"2014-07-01","ids":{"openalex":"https://openalex.org/W2134899507","doi":"https://doi.org/10.1109/isvdat.2014.6881046","mag":"2134899507"},"language":"en","primary_location":{"id":"doi:10.1109/isvdat.2014.6881046","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2014.6881046","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022334979","display_name":"Sanjay Singh","orcid":"https://orcid.org/0000-0002-2249-799X"},"institutions":[{"id":"https://openalex.org/I41763900","display_name":"Central Electronics Engineering Research Institute","ror":"https://ror.org/01hh45364","country_code":"IN","type":"facility","lineage":["https://openalex.org/I2799351866","https://openalex.org/I41763900","https://openalex.org/I4210134808","https://openalex.org/I66760702"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Sanjay Singh","raw_affiliation_strings":["CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India"],"affiliations":[{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","institution_ids":["https://openalex.org/I41763900"]},{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India","institution_ids":["https://openalex.org/I41763900"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011982184","display_name":"Sumeet Saurav","orcid":"https://orcid.org/0000-0002-4375-4107"},"institutions":[{"id":"https://openalex.org/I41763900","display_name":"Central Electronics Engineering Research Institute","ror":"https://ror.org/01hh45364","country_code":"IN","type":"facility","lineage":["https://openalex.org/I2799351866","https://openalex.org/I41763900","https://openalex.org/I4210134808","https://openalex.org/I66760702"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sumeet Saurav","raw_affiliation_strings":["CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India"],"affiliations":[{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","institution_ids":["https://openalex.org/I41763900"]},{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India","institution_ids":["https://openalex.org/I41763900"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101593160","display_name":"Ravi Saini","orcid":"https://orcid.org/0000-0003-0288-341X"},"institutions":[{"id":"https://openalex.org/I41763900","display_name":"Central Electronics Engineering Research Institute","ror":"https://ror.org/01hh45364","country_code":"IN","type":"facility","lineage":["https://openalex.org/I2799351866","https://openalex.org/I41763900","https://openalex.org/I4210134808","https://openalex.org/I66760702"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ravi Saini","raw_affiliation_strings":["CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India"],"affiliations":[{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","institution_ids":["https://openalex.org/I41763900"]},{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India","institution_ids":["https://openalex.org/I41763900"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101588879","display_name":"Anil Saini","orcid":"https://orcid.org/0000-0003-3238-4881"},"institutions":[{"id":"https://openalex.org/I41763900","display_name":"Central Electronics Engineering Research Institute","ror":"https://ror.org/01hh45364","country_code":"IN","type":"facility","lineage":["https://openalex.org/I2799351866","https://openalex.org/I41763900","https://openalex.org/I4210134808","https://openalex.org/I66760702"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anil K Saini","raw_affiliation_strings":["CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India"],"affiliations":[{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","institution_ids":["https://openalex.org/I41763900"]},{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India","institution_ids":["https://openalex.org/I41763900"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100712113","display_name":"Chandra Shekhar","orcid":"https://orcid.org/0000-0002-2114-9096"},"institutions":[{"id":"https://openalex.org/I41763900","display_name":"Central Electronics Engineering Research Institute","ror":"https://ror.org/01hh45364","country_code":"IN","type":"facility","lineage":["https://openalex.org/I2799351866","https://openalex.org/I41763900","https://openalex.org/I4210134808","https://openalex.org/I66760702"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Chandra Shekhar","raw_affiliation_strings":["CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India"],"affiliations":[{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India","institution_ids":["https://openalex.org/I41763900"]},{"raw_affiliation_string":"CSIR-Central Electronics Engineering Research Institute, Pilani, 333031, Rajasthan India","institution_ids":["https://openalex.org/I41763900"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103115170","display_name":"Anil Vohra","orcid":"https://orcid.org/0000-0003-1377-3451"},"institutions":[{"id":"https://openalex.org/I178000100","display_name":"Kurukshetra University","ror":"https://ror.org/019bzvf55","country_code":"IN","type":"education","lineage":["https://openalex.org/I178000100"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anil Vohra","raw_affiliation_strings":["Electronic Science Department, Kurukshetra University, Kurukshetra, Haryana, India","Electronic Science Department, Kurukshetra University, Kurukshetra, 136119 Haryana, India"],"affiliations":[{"raw_affiliation_string":"Electronic Science Department, Kurukshetra University, Kurukshetra, Haryana, India","institution_ids":["https://openalex.org/I178000100"]},{"raw_affiliation_string":"Electronic Science Department, Kurukshetra University, Kurukshetra, 136119 Haryana, India","institution_ids":["https://openalex.org/I178000100"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5022334979"],"corresponding_institution_ids":["https://openalex.org/I41763900"],"apc_list":null,"apc_paid":null,"fwci":0.4578,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.72285858,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7845243215560913},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.663556694984436},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6470432281494141},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.6070864200592041},{"id":"https://openalex.org/keywords/video-processing","display_name":"Video processing","score":0.5884815454483032},{"id":"https://openalex.org/keywords/video-capture","display_name":"Video capture","score":0.446354478597641},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4343443810939789},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3851420283317566},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.29391467571258545},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2227599024772644},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1895706057548523}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7845243215560913},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.663556694984436},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6470432281494141},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.6070864200592041},{"id":"https://openalex.org/C65483669","wikidata":"https://www.wikidata.org/wiki/Q3536669","display_name":"Video processing","level":2,"score":0.5884815454483032},{"id":"https://openalex.org/C151211776","wikidata":"https://www.wikidata.org/wiki/Q2778015","display_name":"Video capture","level":3,"score":0.446354478597641},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4343443810939789},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3851420283317566},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.29391467571258545},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2227599024772644},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1895706057548523}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isvdat.2014.6881046","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isvdat.2014.6881046","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"18th International Symposium on VLSI Design and Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1566124064","https://openalex.org/W1578964053","https://openalex.org/W1968058417","https://openalex.org/W2087755759","https://openalex.org/W6634683497"],"related_works":["https://openalex.org/W2544043553","https://openalex.org/W2546284597","https://openalex.org/W2348562861","https://openalex.org/W2540393334","https://openalex.org/W1983570530","https://openalex.org/W2390042878","https://openalex.org/W2062932566","https://openalex.org/W2271847574","https://openalex.org/W2746234147","https://openalex.org/W2085828379"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,43,56],"design":[4],"of":[5,46,53],"a":[6,15,60],"dedicated":[7],"VLSI":[8],"architecture":[9,38],"for":[10,32,66],"focused":[11,33,57],"region":[12,34],"extraction":[13],"in":[14,59,64],"video":[16,47,62],"sequence":[17],"and":[18],"its":[19],"implementation":[20],"on":[21],"Virtex-5":[22],"(ML510)":[23],"FPGA":[24],"platform.":[25],"Edge":[26],"width":[27],"based":[28],"scheme":[29],"is":[30,39,51],"used":[31],"extraction.":[35],"The":[36],"proposed":[37],"designed":[40],"to":[41],"meet":[42],"real-time":[44,65],"requirements":[45],"surveillance":[48],"applications.":[49],"It":[50],"capable":[52],"robustly":[54],"extracting":[55],"regions":[58],"live":[61],"stream":[63],"standard":[67],"PAL":[68],"size":[69],"color":[70],"video.":[71]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2026-04-17T18:11:37.981687","created_date":"2025-10-10T00:00:00"}
