{"id":"https://openalex.org/W2542567988","doi":"https://doi.org/10.1109/issoc.2006.322001","title":"IP Reuse for Flexible &amp; Efficient DSP Platform Chips","display_name":"IP Reuse for Flexible &amp; Efficient DSP Platform Chips","publication_year":2006,"publication_date":"2006-11-01","ids":{"openalex":"https://openalex.org/W2542567988","doi":"https://doi.org/10.1109/issoc.2006.322001","mag":"2542567988"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2006.322001","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2006.322001","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 International Symposium on System-on-Chip","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021650369","display_name":"P.M. Heysters","orcid":null},"institutions":[{"id":"https://openalex.org/I4210090032","display_name":"Recore Systems (Netherlands)","ror":"https://ror.org/008am1c32","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210090032"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"Paul M. Heysters","raw_affiliation_strings":["Recore Systems, Enschede, Netherlands"],"affiliations":[{"raw_affiliation_string":"Recore Systems, Enschede, Netherlands","institution_ids":["https://openalex.org/I4210090032"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5021650369"],"corresponding_institution_ids":["https://openalex.org/I4210090032"],"apc_list":null,"apc_paid":null,"fwci":0.2787,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.60618579,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7710171937942505},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.687192440032959},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6239979863166809},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.6071674227714539},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5910897254943848},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5865177512168884},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.538797914981842},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.415607213973999},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31675636768341064},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2315979301929474},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09773793816566467}],"concepts":[{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7710171937942505},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.687192440032959},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6239979863166809},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.6071674227714539},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5910897254943848},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5865177512168884},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.538797914981842},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.415607213973999},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31675636768341064},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2315979301929474},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09773793816566467},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/issoc.2006.322001","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2006.322001","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 International Symposium on System-on-Chip","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8399999737739563}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2384475851","https://openalex.org/W2000444236","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W1876592433","https://openalex.org/W2083269738","https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2136854845"],"abstract_inverted_index":{"Embedded":[0],"systems":[1],"must":[2],"be":[3],"flexible,":[4],"energy-efficient,":[5],"high":[6],"performance":[7],"and":[8],"low":[9],"cost.":[10],"These":[11],"conflicting":[12,40],"requirements":[13],"require":[14],"a":[15,45],"platform":[16,52],"based":[17],"design":[18],"approach.":[19],"Recore":[20,34],"Systems":[21],"provides":[22],"semiconductor":[23],"IP":[24],"solutions":[25],"for":[26,50],"programmable":[27,51],"systems-on-chip.":[28],"The":[29,42],"coarse-grained":[30],"reconfigurable":[31,47],"technology":[32],"of":[33],"promises":[35],"to":[36],"satisfy":[37],"all":[38],"the":[39],"requirements.":[41],"Montiumtrade":[43],"is":[44],"dynamically":[46],"DSP":[48],"core":[49],"chips":[53]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
