{"id":"https://openalex.org/W2060539483","doi":"https://doi.org/10.1109/isqed.2010.5450541","title":"Variation aware guard -banding for SOC static timing analysis","display_name":"Variation aware guard -banding for SOC static timing analysis","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W2060539483","doi":"https://doi.org/10.1109/isqed.2010.5450541","mag":"2060539483"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2010.5450541","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450541","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109884670","display_name":"Vee Kin Wong","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210142644","display_name":"Intel (Malaysia)","ror":"https://ror.org/048jw1p35","country_code":"MY","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210142644"]}],"countries":["MY","US"],"is_corresponding":true,"raw_author_name":"Vee Kin Wong","raw_affiliation_strings":["Intel Microelectronics (M) Sdn. Bhd., Penang, Malaysia","Intel Microelectronics (M) Sdn. Bhd,Penang,Malaysia"],"affiliations":[{"raw_affiliation_string":"Intel Microelectronics (M) Sdn. Bhd., Penang, Malaysia","institution_ids":["https://openalex.org/I4210142644"]},{"raw_affiliation_string":"Intel Microelectronics (M) Sdn. Bhd,Penang,Malaysia","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004796789","display_name":"Siong Kiong Teng","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210142644","display_name":"Intel (Malaysia)","ror":"https://ror.org/048jw1p35","country_code":"MY","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210142644"]}],"countries":["MY","US"],"is_corresponding":false,"raw_author_name":"Siong Kiong Teng","raw_affiliation_strings":["Intel Microelectronics (M) Sdn. Bhd., Penang, Malaysia","Intel Microelectronics (M) Sdn. Bhd,Penang,Malaysia"],"affiliations":[{"raw_affiliation_string":"Intel Microelectronics (M) Sdn. Bhd., Penang, Malaysia","institution_ids":["https://openalex.org/I4210142644"]},{"raw_affiliation_string":"Intel Microelectronics (M) Sdn. Bhd,Penang,Malaysia","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5109884670"],"corresponding_institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I4210142644"],"apc_list":null,"apc_paid":null,"fwci":0.2886,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.63310762,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"428","last_page":"431"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/guard","display_name":"Guard (computer science)","score":0.7666817903518677},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5949953198432922},{"id":"https://openalex.org/keywords/static-analysis","display_name":"Static analysis","score":0.5416735410690308},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.5177713632583618},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.48500773310661316},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.43998983502388},{"id":"https://openalex.org/keywords/variation","display_name":"Variation (astronomy)","score":0.4116341471672058},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2648181915283203},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18139982223510742}],"concepts":[{"id":"https://openalex.org/C141141315","wikidata":"https://www.wikidata.org/wiki/Q2379942","display_name":"Guard (computer science)","level":2,"score":0.7666817903518677},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5949953198432922},{"id":"https://openalex.org/C97686452","wikidata":"https://www.wikidata.org/wiki/Q7604153","display_name":"Static analysis","level":2,"score":0.5416735410690308},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.5177713632583618},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.48500773310661316},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.43998983502388},{"id":"https://openalex.org/C2778334786","wikidata":"https://www.wikidata.org/wiki/Q1586270","display_name":"Variation (astronomy)","level":2,"score":0.4116341471672058},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2648181915283203},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18139982223510742},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C44870925","wikidata":"https://www.wikidata.org/wiki/Q37547","display_name":"Astrophysics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2010.5450541","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450541","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6000000238418579}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1991908651","https://openalex.org/W2109173886","https://openalex.org/W2120116751","https://openalex.org/W2130601386","https://openalex.org/W2146978563","https://openalex.org/W2163262735","https://openalex.org/W3142165057","https://openalex.org/W4230035938","https://openalex.org/W4245208012","https://openalex.org/W4254506919","https://openalex.org/W6641884055","https://openalex.org/W6676813794"],"related_works":["https://openalex.org/W2094926594","https://openalex.org/W2357760762","https://openalex.org/W2029945169","https://openalex.org/W4390291562","https://openalex.org/W1970636450","https://openalex.org/W4210274887","https://openalex.org/W2118300947","https://openalex.org/W939370856","https://openalex.org/W3124381767","https://openalex.org/W2775062067"],"abstract_inverted_index":{"The":[0],"conventional":[1],"approach":[2],"to":[3,9,20,49],"static":[4],"timing":[5],"analysis":[6],"(STA)":[7],"is":[8],"apply":[10],"a":[11],"constant":[12],"guard-band":[13,32],"against":[14],"parameter":[15],"variation.":[16],"This":[17],"can":[18,33],"lead":[19],"costly":[21],"and":[22,53],"inefficient":[23],"design.":[24],"In":[25],"this":[26],"paper,":[27],"we":[28],"show":[29],"that":[30],"the":[31],"be":[34],"reduced":[35],"through":[36],"statistical":[37],"methods":[38],"applied":[39],"using":[40],"an":[41],"industry":[42],"standard":[43],"STA":[44],"tool":[45],"while":[46],"preserving":[47],"pessimism":[48],"ensure":[50],"design":[51],"quality":[52],"yield.":[54]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}