{"id":"https://openalex.org/W2053410184","doi":"https://doi.org/10.1109/isqed.2010.5450499","title":"Auto-BET-AMS: An automated device and circuit optimization platform to benchmark emerging technologies for performance and variability using an analog and mixed-signal design framework","display_name":"Auto-BET-AMS: An automated device and circuit optimization platform to benchmark emerging technologies for performance and variability using an analog and mixed-signal design framework","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W2053410184","doi":"https://doi.org/10.1109/isqed.2010.5450499","mag":"2053410184"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2010.5450499","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450499","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088108456","display_name":"Angada B. Sachid","orcid":"https://orcid.org/0000-0002-7596-2314"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Angada B. Sachid","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Bombay, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072837015","display_name":"Rajesh A. Thakker","orcid":"https://orcid.org/0000-0001-9625-7588"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rajesh A. Thakker","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Bombay, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066931049","display_name":"Chaitanya Sathe","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chaitanya Sathe","raw_affiliation_strings":["University of Illinois, Urbana-Champaign, USA","University of Illinois, Urbana-Champaign , USA"],"affiliations":[{"raw_affiliation_string":"University of Illinois, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]},{"raw_affiliation_string":"University of Illinois, Urbana-Champaign , USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029767607","display_name":"Maryam Shojaei Baghini","orcid":"https://orcid.org/0000-0001-6568-3736"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Maryam Shojaei Baghini","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Bombay, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103648744","display_name":"Dinesh Kumar Sharma","orcid":null},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Dinesh K. Sharma","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Bombay, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065019619","display_name":"V. Ramgopal Rao","orcid":"https://orcid.org/0000-0001-9157-957X"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"V. Ramgopal Rao","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Bombay, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101943503","display_name":"Mahesh B. Patil","orcid":"https://orcid.org/0000-0001-8766-1044"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Mahesh B. Patil","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Bombay, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5088108456"],"corresponding_institution_ids":["https://openalex.org/I162827531"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11757939,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"30","issue":null,"first_page":"713","last_page":"720"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.6767941117286682},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6536370515823364},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6400799751281738},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5949918627738953},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5506628155708313},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.5354322195053101},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4952835142612457},{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.42267265915870667},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.41005682945251465},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2819860577583313},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.279297798871994},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2628004848957062}],"concepts":[{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.6767941117286682},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6536370515823364},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6400799751281738},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5949918627738953},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5506628155708313},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5354322195053101},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4952835142612457},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.42267265915870667},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.41005682945251465},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2819860577583313},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.279297798871994},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2628004848957062},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2010.5450499","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450499","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.6200000047683716,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1484361599","https://openalex.org/W1492266060","https://openalex.org/W1639032689","https://openalex.org/W1972436362","https://openalex.org/W1977507499","https://openalex.org/W1988584938","https://openalex.org/W2005075924","https://openalex.org/W2027698415","https://openalex.org/W2030684844","https://openalex.org/W2035061364","https://openalex.org/W2048308239","https://openalex.org/W2078422387","https://openalex.org/W2078949019","https://openalex.org/W2099706447","https://openalex.org/W2110128073","https://openalex.org/W2120889849","https://openalex.org/W2131687057","https://openalex.org/W2147849504","https://openalex.org/W2152195021","https://openalex.org/W2157567925","https://openalex.org/W2157679815","https://openalex.org/W2944617326"],"related_works":["https://openalex.org/W2389800961","https://openalex.org/W1995389502","https://openalex.org/W2007222089","https://openalex.org/W4242258007","https://openalex.org/W2155285526","https://openalex.org/W2394022884","https://openalex.org/W2185815555","https://openalex.org/W2071235072","https://openalex.org/W1924227955","https://openalex.org/W2375192119"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"present":[4],"Auto-BET-AMS,":[5],"an":[6],"automated":[7],"device,":[8],"circuit":[9,33,50],"and":[10,32,49,81,97,100,105,146,164],"system-level":[11],"simulation":[12],"platform":[13,27,66,109],"suitable":[14,29],"for":[15,30,83,131,141],"benchmarking":[16],"emerging":[17,60,106],"technologies":[18],"at":[19],"the":[20,23,38,65,118,176],"end":[21],"of":[22,37,40,47,59,86,113,178],"CMOS":[24],"roadmap.":[25],"This":[26],"is":[28,42,52,91,129,184],"technologists":[31],"designers":[34],"alike.":[35],"One":[36],"features":[39],"Auto-BET-AMS":[41,89],"that":[43,73],"no":[44],"advanced":[45],"knowledge":[46],"device":[48],"design":[51,95],"needed":[53,130],"to":[54,77,93],"perform":[55],"a":[56,69,84,123],"fair":[57],"evaluation":[58],"technologies.":[61,107],"To":[62],"enable":[63],"this,":[64],"comes":[67],"with":[68],"versatile":[70],"multi-variable":[71],"optimizer":[72],"can":[74,110],"be":[75],"used":[76],"quickly":[78],"optimize":[79],"devices":[80,115,132],"circuits":[82,99,148,183],"set":[85],"specifications.":[87],"Using":[88],"it":[90],"possible":[92],"accurately":[94],"digital":[96,145],"analog":[98,147],"assess":[101],"them":[102],"in":[103,116],"conventional":[104],"The":[108,127],"handle":[111],"definitions":[112],"charge-based":[114],"either":[117],"compact":[119,138],"model":[120],"form":[121],"or":[122],"look-up":[124],"table":[125],"form.":[126],"latter":[128],"which":[133],"do":[134],"not":[135],"have":[136],"mature":[137],"models":[139],"developed":[140],"them.":[142],"Several":[143],"representative":[144],"like":[149],"buffer":[150],"chain,":[151],"SRAM":[152],"cell,":[153],"two-stage":[154],"Miller":[155,165],"Op-Amp,":[156,159],"three-stage":[157],"low-voltage":[158],"temperature":[160],"compensated":[161],"current":[162],"reference":[163],"OTA":[166],"are":[167],"optimized":[168],"by":[169],"considering":[170],"PVT":[171],"variations":[172,180],"using":[173],"Auto-BET-AMS.":[174],"Additionally,":[175],"impact":[177],"parametric":[179],"on":[181],"these":[182],"studied.":[185]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
