{"id":"https://openalex.org/W2106481530","doi":"https://doi.org/10.1109/isqed.2009.4810300","title":"An effective approach to detect logic soft errors in digital circuits based on GRAAL","display_name":"An effective approach to detect logic soft errors in digital circuits based on GRAAL","publication_year":2009,"publication_date":"2009-03-01","ids":{"openalex":"https://openalex.org/W2106481530","doi":"https://doi.org/10.1109/isqed.2009.4810300","mag":"2106481530"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2009.4810300","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810300","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080895253","display_name":"Hai Yu","orcid":"https://orcid.org/0000-0002-8024-1781"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Hai Yu","raw_affiliation_strings":["TIMA Laboratory (CNRS UJF INPG), Grenoble, France","TIMA Laboratory (CNRS-UJF-INPG), 46 Avenue F\u00e9lix Viallet, 38031 Grenoble, France"],"affiliations":[{"raw_affiliation_string":"TIMA Laboratory (CNRS UJF INPG), Grenoble, France","institution_ids":["https://openalex.org/I4210087012","https://openalex.org/I177483745","https://openalex.org/I899635006","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"TIMA Laboratory (CNRS-UJF-INPG), 46 Avenue F\u00e9lix Viallet, 38031 Grenoble, France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I1294671590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039513293","display_name":"M. Nicolaidis","orcid":"https://orcid.org/0000-0003-1091-9339"},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Michael Nicolaidis","raw_affiliation_strings":["TIMA Laboratory (CNRS UJF INPG), Grenoble, France","TIMA Laboratory (CNRS-UJF-INPG), 46 Avenue F\u00e9lix Viallet, 38031 Grenoble, France"],"affiliations":[{"raw_affiliation_string":"TIMA Laboratory (CNRS UJF INPG), Grenoble, France","institution_ids":["https://openalex.org/I4210087012","https://openalex.org/I177483745","https://openalex.org/I899635006","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"TIMA Laboratory (CNRS-UJF-INPG), 46 Avenue F\u00e9lix Viallet, 38031 Grenoble, France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I1294671590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053835664","display_name":"Lorena Anghel","orcid":"https://orcid.org/0000-0001-9569-0072"},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Lorena Anghel","raw_affiliation_strings":["TIMA Laboratory (CNRS UJF INPG), Grenoble, France","TIMA Laboratory (CNRS-UJF-INPG), 46 Avenue F\u00e9lix Viallet, 38031 Grenoble, France"],"affiliations":[{"raw_affiliation_string":"TIMA Laboratory (CNRS UJF INPG), Grenoble, France","institution_ids":["https://openalex.org/I4210087012","https://openalex.org/I177483745","https://openalex.org/I899635006","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"TIMA Laboratory (CNRS-UJF-INPG), 46 Avenue F\u00e9lix Viallet, 38031 Grenoble, France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I1294671590"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5080895253"],"corresponding_institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I177483745","https://openalex.org/I4210087012","https://openalex.org/I899635006"],"apc_list":null,"apc_paid":null,"fwci":1.8245,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.86097424,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"236","last_page":"240"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.7405422925949097},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6785986423492432},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.6261587738990784},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.6202973127365112},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5645245313644409},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5316011905670166},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.5293076038360596},{"id":"https://openalex.org/keywords/finite-state-machine","display_name":"Finite-state machine","score":0.48451465368270874},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.48423051834106445},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.4330722689628601},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.43222370743751526},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4262527823448181},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.42315351963043213},{"id":"https://openalex.org/keywords/circuit-reliability","display_name":"Circuit reliability","score":0.41024765372276306},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3428387939929962},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2717205882072449},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22304999828338623},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.204157292842865}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.7405422925949097},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6785986423492432},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.6261587738990784},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.6202973127365112},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5645245313644409},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5316011905670166},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.5293076038360596},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.48451465368270874},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.48423051834106445},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.4330722689628601},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.43222370743751526},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4262527823448181},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.42315351963043213},{"id":"https://openalex.org/C2778309119","wikidata":"https://www.wikidata.org/wiki/Q5121614","display_name":"Circuit reliability","level":4,"score":0.41024765372276306},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3428387939929962},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2717205882072449},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22304999828338623},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.204157292842865},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isqed.2009.4810300","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810300","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-00419289v1","is_oa":false,"landing_page_url":"https://hal.science/hal-00419289","pdf_url":null,"source":{"id":"https://openalex.org/S4406922461","display_name":"SPIRE - Sciences Po Institutional REpository","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"10th International Symposium on Quality of Electronic Design (ISQED'09), Mar 2009, San Jose, CA, United States. pp.236-240, ⟨10.1109/ISQED.2009.4810300⟩","raw_type":"Conference papers"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1541483005","https://openalex.org/W1981194937","https://openalex.org/W2007325303","https://openalex.org/W2023856022","https://openalex.org/W2043318181","https://openalex.org/W2097596884","https://openalex.org/W2099569658","https://openalex.org/W2121395914","https://openalex.org/W2121618685","https://openalex.org/W2151830106","https://openalex.org/W2163094833","https://openalex.org/W2167002145","https://openalex.org/W2169213530","https://openalex.org/W3149410719","https://openalex.org/W4299639710","https://openalex.org/W6684715968"],"related_works":["https://openalex.org/W2110991008","https://openalex.org/W2000201823","https://openalex.org/W2149051075","https://openalex.org/W2061536619","https://openalex.org/W3048013713","https://openalex.org/W2394408226","https://openalex.org/W2164587072","https://openalex.org/W2766490181","https://openalex.org/W3121621657","https://openalex.org/W143583198"],"abstract_inverted_index":{"Due":[0],"to":[1,31,68,102],"the":[2,104,112],"notable":[3],"change":[4],"of":[5],"channel":[6],"width,":[7],"supply":[8],"voltage;":[9],"and":[10,40,64,79,85],"clock":[11],"frequency,":[12],"CMOS":[13],"IC":[14],"technologies":[15],"are":[16,27],"rapidly":[17],"approaching":[18,23],"their":[19],"ultimate":[20],"limits.":[21],"By":[22],"these":[24],"limits,":[25],"circuits":[26],"becoming":[28],"increasingly":[29,45],"sensitive":[30],"noise,":[32],"which":[33],"will":[34],"result":[35],"in":[36],"unacceptable":[37],"error":[38,48,105,115],"rates":[39],"make":[41],"further":[42],"nanometer":[43],"scaling":[44],"difficult.":[46],"The":[47,108],"detection":[49,71,106,116],"scheme":[50],"based":[51],"on":[52],"GRAAL":[53],"architecture":[54],"(Global":[55],"Reliability":[56],"Architecture":[57],"Approach":[58],"for":[59,73],"Logic)":[60],"combines":[61],"latch-based":[62],"design":[63],"time":[65],"redundancy":[66],"techniques":[67],"achieve":[69],"high":[70,114],"efficiency":[72],"temporary":[74],"faults":[75],"(timing":[76],"faults,":[77],"SEUs,":[78],"SETs)":[80],"at":[81],"low":[82],"area,":[83],"power":[84],"speed":[86],"penalties.":[87],"In":[88],"this":[89],"paper,":[90],"we":[91],"use":[92],"a":[93],"finite":[94],"state":[95],"machine":[96],"(FSM)":[97],"circuit":[98],"as":[99],"test":[100],"vehicle":[101],"validate":[103,111],"architecture.":[107],"experimental":[109],"results":[110],"claimed":[113],"efficiency.":[117]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-03-28T08:17:26.163206","created_date":"2025-10-10T00:00:00"}