{"id":"https://openalex.org/W3141849821","doi":"https://doi.org/10.1109/isqed.2006.110","title":"Question: DRC or DfM? Answer: FMEA and ROI","display_name":"Question: DRC or DfM? Answer: FMEA and ROI","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W3141849821","doi":"https://doi.org/10.1109/isqed.2006.110","mag":"3141849821"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2006.110","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2006.110","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"7th International Symposium on Quality Electronic Design (ISQED'06)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007646958","display_name":"A. Balasi\u0144ski","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"A. Balasinski","raw_affiliation_strings":["Cypress Semiconductors, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductors, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5007646958"],"corresponding_institution_ids":["https://openalex.org/I4210127281"],"apc_list":null,"apc_paid":null,"fwci":1.5261,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.84706059,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"6 pp.","last_page":"794"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.2337999939918518,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.2337999939918518,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.2126999944448471,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.0763000026345253,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/design-for-manufacturability","display_name":"Design for manufacturability","score":0.9591275453567505},{"id":"https://openalex.org/keywords/failure-mode-and-effects-analysis","display_name":"Failure mode and effects analysis","score":0.6391934156417847},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6319366693496704},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5508058071136475},{"id":"https://openalex.org/keywords/failure-mode-effects-and-criticality-analysis","display_name":"Failure mode, effects, and criticality analysis","score":0.5296050310134888},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2643492817878723}],"concepts":[{"id":"https://openalex.org/C62064638","wikidata":"https://www.wikidata.org/wiki/Q553878","display_name":"Design for manufacturability","level":2,"score":0.9591275453567505},{"id":"https://openalex.org/C66283442","wikidata":"https://www.wikidata.org/wiki/Q1389268","display_name":"Failure mode and effects analysis","level":2,"score":0.6391934156417847},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6319366693496704},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5508058071136475},{"id":"https://openalex.org/C30098461","wikidata":"https://www.wikidata.org/wiki/Q909342","display_name":"Failure mode, effects, and criticality analysis","level":3,"score":0.5296050310134888},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2643492817878723},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2006.110","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2006.110","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"7th International Symposium on Quality Electronic Design (ISQED'06)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2055539433","https://openalex.org/W2067013987","https://openalex.org/W2123554048"],"related_works":["https://openalex.org/W2220324042","https://openalex.org/W3138570190","https://openalex.org/W2782257358","https://openalex.org/W4362495947","https://openalex.org/W2117718616","https://openalex.org/W3146179449","https://openalex.org/W2013435365","https://openalex.org/W2059800017","https://openalex.org/W2161863954","https://openalex.org/W4249192810"],"abstract_inverted_index":{"Design":[0],"for":[1,46,154,174],"manufacturability":[2],"(DfM)":[3],"is":[4,35,88,127,152],"a":[5,11],"design":[6,24,70,102],"verification":[7],"methodology":[8,126],"linked":[9],"to":[10,56,73,99,168],"set":[12,177],"of":[13,49,109,149,170,178],"requirements":[14],"that":[15],"can":[16],"be":[17],"perceived":[18],"as":[19],"gray":[20],"area":[21],"within":[22],"the":[23,37,47,58,62,66,81,130,144,171,175],"rule":[25],"check":[26],"(DRC)":[27],"approach":[28,173],"based":[29,128],"on":[30,129,139,158,160],"rigid":[31],"pass/fail":[32],"criteria.":[33],"This":[34,124],"because":[36],"DfM":[38,84,155],"rules,":[39],"unlike":[40],"DRC,":[41],"are":[42,53,72,165],"not":[43],"directly":[44],"responsible":[45],"functionality":[48],"individual":[50],"devices,":[51],"but":[52],"broadly":[54],"scoped":[55],"address":[57],"die":[59],"yield":[60],"over":[61],"process":[63],"corners.":[64],"At":[65],"same":[67,176],"time,":[68],"all":[69,101],"rules":[71,87,103,156,179],"ensure":[74],"high":[75],"performance":[76],"and":[77,85,91,112,121,133,137,147],"profit":[78],"margins.":[79],"Therefore,":[80],"distinction":[82],"between":[83],"DRC":[86],"often":[89],"artificial":[90],"confusing.":[92],"In":[93],"this":[94],"paper,":[95],"we":[96],"propose":[97],"how":[98],"combine":[100],"into":[104],"one":[105],"enforceable":[106],"deck,":[107],"regardless":[108],"their":[110],"origin,":[111],"introduce":[113],"an":[114],"implementation":[115],"cutoff":[116],"lines":[117],"decided":[118],"by":[119],"technology":[120],"business":[122],"factors.":[123],"new":[125],"failure":[131,150],"mode":[132],"effect":[134],"analysis":[135],"(FMEA)":[136],"return":[138],"investment":[140],"(RoI).":[141],"FMEA,":[142],"involving":[143],"criticality,":[145],"occurrence,":[146],"detectability":[148],"modes,":[151],"demonstrated":[153],"focused":[157],"system":[159],"chip":[161],"(SoC).":[162],"The":[163],"results":[164],"then":[166],"correlated":[167],"those":[169],"RoI":[172]},"counts_by_year":[],"updated_date":"2026-03-03T08:47:05.690250","created_date":"2025-10-10T00:00:00"}