{"id":"https://openalex.org/W2133105902","doi":"https://doi.org/10.1109/ismvl.1994.302210","title":"CML current mode full adders for 2.5-V power supply","display_name":"CML current mode full adders for 2.5-V power supply","publication_year":2002,"publication_date":"2002-12-17","ids":{"openalex":"https://openalex.org/W2133105902","doi":"https://doi.org/10.1109/ismvl.1994.302210","mag":"2133105902"},"language":"en","primary_location":{"id":"doi:10.1109/ismvl.1994.302210","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ismvl.1994.302210","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004188401","display_name":"A. Kaz\u00e9min\u00e9jad","orcid":null},"institutions":[{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"A. Kazeminejad","raw_affiliation_strings":["Universit\u00e9 Paris Sud, Orsay, France","Lab. de Recherche en Inf., Univ. de Paris-Sud, Orsay, France"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Paris Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]},{"raw_affiliation_string":"Lab. de Recherche en Inf., Univ. de Paris-Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044886674","display_name":"Keivan Navi","orcid":"https://orcid.org/0000-0002-5586-7766"},"institutions":[{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"K. Navi","raw_affiliation_strings":["Universit\u00e9 Paris Sud, Orsay, France","Lab. de Recherche en Inf., Univ. de Paris-Sud, Orsay, France"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Paris Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]},{"raw_affiliation_string":"Lab. de Recherche en Inf., Univ. de Paris-Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089840071","display_name":"Daniel Etiemble","orcid":"https://orcid.org/0000-0001-9584-5601"},"institutions":[{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"D. Etiemble","raw_affiliation_strings":["Universit\u00e9 Paris Sud, Orsay, France","Lab. de Recherche en Inf., Univ. de Paris-Sud, Orsay, France"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Paris Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]},{"raw_affiliation_string":"Lab. de Recherche en Inf., Univ. de Paris-Sud, Orsay, France","institution_ids":["https://openalex.org/I102197404"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5004188401"],"corresponding_institution_ids":["https://openalex.org/I102197404"],"apc_list":null,"apc_paid":null,"fwci":0.3394,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.61135178,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"10","last_page":"14"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.819808840751648},{"id":"https://openalex.org/keywords/schematic","display_name":"Schematic","score":0.5797924399375916},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5637110471725464},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5201511979103088},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.47651350498199463},{"id":"https://openalex.org/keywords/current","display_name":"Current (fluid)","score":0.4716324508190155},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.43820732831954956},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.42498356103897095},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.41141176223754883},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.41013413667678833},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3995167016983032},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3075292110443115},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.2491486668586731},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.22406789660453796}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.819808840751648},{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.5797924399375916},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5637110471725464},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5201511979103088},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.47651350498199463},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.4716324508190155},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.43820732831954956},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.42498356103897095},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.41141176223754883},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.41013413667678833},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3995167016983032},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3075292110443115},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.2491486668586731},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.22406789660453796},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ismvl.1994.302210","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ismvl.1994.302210","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1827072887","https://openalex.org/W2044463224","https://openalex.org/W2115029514","https://openalex.org/W2129206242","https://openalex.org/W3161885991"],"related_works":["https://openalex.org/W3154683910","https://openalex.org/W1846734616","https://openalex.org/W4390550886","https://openalex.org/W2359532622","https://openalex.org/W3134543635","https://openalex.org/W2921318524","https://openalex.org/W3217463396","https://openalex.org/W2377571686","https://openalex.org/W4380988671","https://openalex.org/W2290014775"],"abstract_inverted_index":{"We":[0],"present":[1],"the":[2,35,48],"basic":[3],"structure":[4],"and":[5,56,74],"performance":[6],"of":[7],"CML":[8],"current":[9,50,64],"mode":[10,46,51,65],"full":[11],"adders,":[12],"that":[13],"are":[14],"used":[15,31],"as":[16],"carry":[17],"save":[18],"adders":[19],"(CSA)":[20],"in":[21],"combinatorial":[22],"multipliers.":[23],"A":[24],"1.2":[25],"/spl":[26],"mu/m":[27],"BiCMOS":[28],"technology":[29],"is":[30,67],"for":[32],"simulations":[33],"but":[34,60],"schematic":[36],"assumes":[37],"a":[38],"2.5-V":[39],"power":[40,57,72],"supply.":[41],"Compared":[42],"with":[43],"binary":[44],"voltage":[45],"CSAs,":[47],"multivalued":[49],"CSAs":[52],"have":[53],"chip":[54],"area":[55],"dissipation":[58],"advantage,":[59],"speed":[61],"disadvantage.":[62],"The":[63],"version":[66],"far":[68],"more":[69],"sensitive":[70],"to":[71],"supply":[73],"temperature":[75],"shifts.<":[76],"<ETX":[77],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[78],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">&gt;</ETX>":[79]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
