{"id":"https://openalex.org/W2943499660","doi":"https://doi.org/10.1109/iscas.2019.8702255","title":"A 32-Pixel IDCT-Adapted HEVC Intra Prediction VLSI Architecture","display_name":"A 32-Pixel IDCT-Adapted HEVC Intra Prediction VLSI Architecture","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2943499660","doi":"https://doi.org/10.1109/iscas.2019.8702255","mag":"2943499660"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2019.8702255","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702255","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032217841","display_name":"Genwei Tang","orcid":"https://orcid.org/0000-0002-3467-7496"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Genwei Tang","raw_affiliation_strings":["State Key Lab of ASIC & System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Lab of ASIC & System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073266325","display_name":"Minge Jing","orcid":"https://orcid.org/0009-0005-0446-5600"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Minge Jing","raw_affiliation_strings":["State Key Lab of ASIC & System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Lab of ASIC & System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100656792","display_name":"Xiaoyang Zeng","orcid":"https://orcid.org/0000-0003-3986-137X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoyang Zeng","raw_affiliation_strings":["State Key Lab of ASIC & System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Lab of ASIC & System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085004179","display_name":"Yibo Fan","orcid":"https://orcid.org/0000-0003-2523-8261"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yibo Fan","raw_affiliation_strings":["State Key Lab of ASIC & System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Lab of ASIC & System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.02815645,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11165","display_name":"Image and Video Quality Assessment","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7198444604873657},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6940679550170898},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.653285026550293},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5627864599227905},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5138126015663147},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4539090096950531},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3365386426448822},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2344871163368225}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7198444604873657},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6940679550170898},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.653285026550293},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5627864599227905},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5138126015663147},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4539090096950531},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3365386426448822},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2344871163368225},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2019.8702255","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702255","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1965420976","https://openalex.org/W1981542807","https://openalex.org/W2020382476","https://openalex.org/W2117057378","https://openalex.org/W2177444257","https://openalex.org/W2478836177","https://openalex.org/W2548278995","https://openalex.org/W2777268178"],"related_works":["https://openalex.org/W4283025278","https://openalex.org/W2082432309","https://openalex.org/W817174743","https://openalex.org/W2050492524","https://openalex.org/W2998315020","https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W2038503502","https://openalex.org/W1979789826","https://openalex.org/W1986774039"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,22,115],"novel":[4],"HEVC":[5,111],"intra":[6,18,25],"prediction":[7,19,46,139],"VLSI":[8],"architecture":[9,97,158],"for":[10],"8K":[11],"video":[12],"decoding,":[13],"which":[14,29],"supports":[15],"all":[16,127],"35":[17],"modes.":[20],"First,":[21],"32":[23,55],"pixels/cycle":[24],"predictor":[26],"is":[27,30,88,123,159],"proposed,":[28],"designed":[31],"to":[32,34,125,147],"adapt":[33],"the":[35,45,81,91,95,100,104,110,128,138,149,156,162],"output":[36],"format":[37],"of":[38,52,59,66,74,109,134,140],"inverse":[39],"discrete":[40],"cosine":[41],"transform":[42,82],"(IDCT),":[43],"and":[44,94,102,119,142,151],"shape":[47],"can":[48,98],"be":[49],"one":[50],"row":[51],"1":[53,60,67,75],"\u00d7":[54,61,68,76],"pixels,":[56,63,70,78],"two":[57],"rows":[58,65,73],"16":[62],"four":[64,72],"8":[69],"or":[71],"4":[77],"depending":[79],"on":[80],"unit":[83],"(TU)":[84],"size.":[85],"The":[86],"throughput":[87],"twice":[89],"as":[90],"latest":[92],"works":[93],"IDCT-adapted":[96],"improve":[99],"parallelism":[101],"reduce":[103],"logic":[105,153,168],"area":[106],"&":[107],"memory":[108],"decoder":[112],"system.":[113],"Besides,":[114],"0.8":[116],"Kb":[117],"horizontal":[118],"vertical":[120],"line":[121],"buffer":[122,126],"proposed":[124,157],"required":[129],"reference":[130],"samples,":[131],"only":[132],"15%":[133],"previous":[135],"works.":[136],"And":[137],"Planar":[141],"angular":[143],"mode":[144],"are":[145],"merged":[146],"share":[148],"multiplier":[150],"save":[152],"area.":[154],"Finally,":[155],"synthesized":[160],"with":[161,166],"TSMC":[163],"65nm":[164],"process":[165],"66.2k":[167],"gates":[169],"under":[170],"400MHz":[171],"working":[172],"frequency.":[173]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
