{"id":"https://openalex.org/W2756765058","doi":"https://doi.org/10.1109/iscas.2017.8050700","title":"A new write-contention based dual-port SRAM PUF with multiple response bits per cell","display_name":"A new write-contention based dual-port SRAM PUF with multiple response bits per cell","publication_year":2017,"publication_date":"2017-05-01","ids":{"openalex":"https://openalex.org/W2756765058","doi":"https://doi.org/10.1109/iscas.2017.8050700","mag":"2756765058"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2017.8050700","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2017.8050700","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015376688","display_name":"Chao Qun Liu","orcid":"https://orcid.org/0000-0001-8014-2516"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Chao Qun Liu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061840305","display_name":"Yue Zheng","orcid":"https://orcid.org/0000-0002-4992-6475"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Yue Zheng","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029335324","display_name":"Chip-Hong Chang","orcid":"https://orcid.org/0000-0002-8897-6176"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Chip-Hong Chang","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":1.1412,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.78894584,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8446193933486938},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6274796724319458},{"id":"https://openalex.org/keywords/physical-unclonable-function","display_name":"Physical unclonable function","score":0.6192842125892639},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.5419872403144836},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.4908235967159271},{"id":"https://openalex.org/keywords/memory-cell","display_name":"Memory cell","score":0.472357839345932},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.43068790435791016},{"id":"https://openalex.org/keywords/randomness","display_name":"Randomness","score":0.41996991634368896},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3015138804912567},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.30019116401672363},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.24633291363716125},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23458778858184814},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2294035255908966},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16730675101280212},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09117287397384644},{"id":"https://openalex.org/keywords/arbiter","display_name":"Arbiter","score":0.08923080563545227}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8446193933486938},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6274796724319458},{"id":"https://openalex.org/C8643368","wikidata":"https://www.wikidata.org/wiki/Q4046262","display_name":"Physical unclonable function","level":3,"score":0.6192842125892639},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.5419872403144836},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.4908235967159271},{"id":"https://openalex.org/C2776638159","wikidata":"https://www.wikidata.org/wiki/Q18343761","display_name":"Memory cell","level":4,"score":0.472357839345932},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.43068790435791016},{"id":"https://openalex.org/C125112378","wikidata":"https://www.wikidata.org/wiki/Q176640","display_name":"Randomness","level":2,"score":0.41996991634368896},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3015138804912567},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.30019116401672363},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.24633291363716125},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23458778858184814},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2294035255908966},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16730675101280212},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09117287397384644},{"id":"https://openalex.org/C2779971761","wikidata":"https://www.wikidata.org/wiki/Q629872","display_name":"Arbiter","level":2,"score":0.08923080563545227},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2017.8050700","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2017.8050700","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.46000000834465027,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1530625153","https://openalex.org/W2000901835","https://openalex.org/W2099231065","https://openalex.org/W2158933924","https://openalex.org/W2304716896","https://openalex.org/W2345666964","https://openalex.org/W2538126211"],"related_works":["https://openalex.org/W2952977857","https://openalex.org/W1981893865","https://openalex.org/W2516208723","https://openalex.org/W3212030054","https://openalex.org/W3090030718","https://openalex.org/W2968661927","https://openalex.org/W2782868546","https://openalex.org/W1523024978","https://openalex.org/W3010822561","https://openalex.org/W2556109850","https://openalex.org/W2616236028","https://openalex.org/W2916391703","https://openalex.org/W2423875452","https://openalex.org/W2542605741","https://openalex.org/W3030114465","https://openalex.org/W2857207798","https://openalex.org/W2614850804","https://openalex.org/W1556965564","https://openalex.org/W2114642855","https://openalex.org/W2944854503"],"abstract_inverted_index":{"Using":[0],"power-up":[1,34],"reset":[2,35],"to":[3,44,53,107,119],"reuse":[4],"Static":[5],"Random":[6],"Access":[7],"Memory":[8],"(SRAM)":[9],"as":[10,33,63,65],"physical":[11],"unclonable":[12],"function":[13],"(PUF)":[14],"suffers":[15],"from":[16],"two":[17,109],"major":[18],"constraints.":[19],"First,":[20],"it":[21],"has":[22,36,58,137],"limited":[23],"entropy":[24],"of":[25,94],"only":[26,120],"one":[27,93],"response":[28,111],"bit":[29],"per":[30,113],"cell.":[31],"Second,":[32],"a":[37,100],"global":[38],"effect,":[39],"extra":[40,60],"storage":[41],"is":[42,105],"needed":[43],"temporarily":[45],"buffer":[46],"the":[47,88,126],"original":[48],"SRAM":[49,73],"content":[50,123],"before":[51],"switching":[52],"PUF":[54,104],"mode.":[55],"This":[56],"process":[57],"introduced":[59],"area-power":[61],"overhead":[62],"well":[64],"potential":[66],"security":[67],"leakage.":[68],"The":[69],"emerging":[70],"dual-port":[71],"(DP)":[72],"cell":[74,114,122],"offers":[75],"attractive":[76],"multiple":[77,97],"access":[78,98],"capability":[79],"for":[80],"low-power":[81],"and":[82,115,143,146],"high-speed":[83],"memory":[84],"transfer.":[85],"By":[86],"levering":[87],"forbidden":[89],"contention":[90],"state":[91],"in":[92],"its":[95,139],"four":[96],"modes,":[99],"new":[101],"DP-SRAM":[102],"based":[103,130],"proposed":[106],"generate":[108],"independent":[110],"bits":[112],"limit":[116],"data":[117],"buffering":[118],"those":[121],"addressed":[124],"by":[125],"challenge.":[127],"Simulation":[128],"results":[129],"on":[131],"PTM":[132],"22nm":[133],"LP":[134],"CMOS":[135],"model":[136],"corroborated":[138],"superior":[140],"reliability,":[141],"uniqueness":[142],"randomness":[144],"over":[145],"above":[147],"these":[148],"meritorious":[149],"advantages.":[150]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}