{"id":"https://openalex.org/W1938709355","doi":"https://doi.org/10.1109/iscas.2001.922315","title":"A 30 MHz DDS clock generator with sub-ns time domain interpolator and -50 dBc spurious level","display_name":"A 30 MHz DDS clock generator with sub-ns time domain interpolator and -50 dBc spurious level","publication_year":2002,"publication_date":"2002-11-13","ids":{"openalex":"https://openalex.org/W1938709355","doi":"https://doi.org/10.1109/iscas.2001.922315","mag":"1938709355"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2001.922315","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2001.922315","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030495665","display_name":"A. Heiskanen","orcid":null},"institutions":[{"id":"https://openalex.org/I98381234","display_name":"University of Oulu","ror":"https://ror.org/03yj89h83","country_code":"FI","type":"education","lineage":["https://openalex.org/I98381234"]}],"countries":["FI"],"is_corresponding":true,"raw_author_name":"A. Heiskanen","raw_affiliation_strings":["Dept. of Electrical Engineering and Infotech Oulu, University of Oulu, Oulu, FINLAND"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical Engineering and Infotech Oulu, University of Oulu, Oulu, FINLAND","institution_ids":["https://openalex.org/I98381234"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051912366","display_name":"A. Mantyniemi","orcid":"https://orcid.org/0000-0002-1775-5245"},"institutions":[{"id":"https://openalex.org/I98381234","display_name":"University of Oulu","ror":"https://ror.org/03yj89h83","country_code":"FI","type":"education","lineage":["https://openalex.org/I98381234"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"A. Mantyniemi","raw_affiliation_strings":["Dept. of Electrical Engineering and Infotech Oulu, University of Oulu, Oulu, FINLAND"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical Engineering and Infotech Oulu, University of Oulu, Oulu, FINLAND","institution_ids":["https://openalex.org/I98381234"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088828732","display_name":"Timo Rahkonen","orcid":"https://orcid.org/0000-0002-1343-1120"},"institutions":[{"id":"https://openalex.org/I98381234","display_name":"University of Oulu","ror":"https://ror.org/03yj89h83","country_code":"FI","type":"education","lineage":["https://openalex.org/I98381234"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"T. Rahkonen","raw_affiliation_strings":["Dept. of Electrical Engineering and Infotech Oulu, University of Oulu, Oulu, FINLAND"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical Engineering and Infotech Oulu, University of Oulu, Oulu, FINLAND","institution_ids":["https://openalex.org/I98381234"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5030495665"],"corresponding_institution_ids":["https://openalex.org/I98381234"],"apc_list":null,"apc_paid":null,"fwci":2.7155,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.89969716,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"4","issue":null,"first_page":"626","last_page":"629"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.9243388772010803},{"id":"https://openalex.org/keywords/direct-digital-synthesizer","display_name":"Direct digital synthesizer","score":0.6121314764022827},{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.5893261432647705},{"id":"https://openalex.org/keywords/spurious-relationship","display_name":"Spurious relationship","score":0.558177649974823},{"id":"https://openalex.org/keywords/signal-generator","display_name":"Signal generator","score":0.5575923919677734},{"id":"https://openalex.org/keywords/time-domain","display_name":"Time domain","score":0.5502246022224426},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5291740298271179},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.511879563331604},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4880739450454712},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47900766134262085},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.466182678937912},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.4103717803955078},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.3085175156593323},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2649940848350525},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.2332996129989624},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.21649563312530518},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20714110136032104},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.1915929615497589},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.17846634984016418},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.16754627227783203},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.0801554024219513}],"concepts":[{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.9243388772010803},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.6121314764022827},{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.5893261432647705},{"id":"https://openalex.org/C97256817","wikidata":"https://www.wikidata.org/wiki/Q1462316","display_name":"Spurious relationship","level":2,"score":0.558177649974823},{"id":"https://openalex.org/C207912722","wikidata":"https://www.wikidata.org/wiki/Q1259123","display_name":"Signal generator","level":3,"score":0.5575923919677734},{"id":"https://openalex.org/C103824480","wikidata":"https://www.wikidata.org/wiki/Q185889","display_name":"Time domain","level":2,"score":0.5502246022224426},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5291740298271179},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.511879563331604},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4880739450454712},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47900766134262085},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.466182678937912},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.4103717803955078},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.3085175156593323},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2649940848350525},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.2332996129989624},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.21649563312530518},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20714110136032104},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.1915929615497589},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.17846634984016418},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.16754627227783203},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.0801554024219513},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2001.922315","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2001.922315","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.800000011920929,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1483608451","https://openalex.org/W1568201353","https://openalex.org/W1587368801","https://openalex.org/W1590967686","https://openalex.org/W1603511442","https://openalex.org/W1902961737","https://openalex.org/W2087262262","https://openalex.org/W2111698733","https://openalex.org/W2128282260","https://openalex.org/W2141492992","https://openalex.org/W2162755111","https://openalex.org/W2165042125","https://openalex.org/W2167167820","https://openalex.org/W2789115578","https://openalex.org/W6628903067","https://openalex.org/W6635160296","https://openalex.org/W6635430282"],"related_works":["https://openalex.org/W2390178440","https://openalex.org/W2971803165","https://openalex.org/W1602380896","https://openalex.org/W2150824877","https://openalex.org/W2379408459","https://openalex.org/W2060249269","https://openalex.org/W4251051505","https://openalex.org/W3141878142","https://openalex.org/W2370071821","https://openalex.org/W2374832013"],"abstract_inverted_index":{"A":[0],"30":[1,3],"MHz,":[2],"mW,":[4],"0.3":[5],"mm/sup":[6],"2/":[7],"DDS":[8,34],"clock":[9,71],"generator":[10,44],"circuit":[11],"with":[12,45],"time":[13],"domain":[14],"interpolation":[15],"and":[16,28,58],"-50":[17],"dBc":[18],"spurious":[19],"signal":[20],"level":[21],"has":[22],"been":[23,36],"designed.":[24],"The":[25],"sine":[26],"look-up-table":[27],"D/A":[29],"converter":[30],"of":[31],"the":[32,51],"conventional":[33],"have":[35],"replaced":[37],"by":[38],"a":[39],"three-step":[40],"digitally":[41],"programmable":[42],"delay":[43],"130":[46],"ps":[47],"resolution.":[48],"This":[49],"increases":[50],"effective":[52],"sampling":[53],"frequency":[54],"to":[55,66],"7.68":[56],"GHz,":[57],"that's":[59],"why":[60],"no":[61],"reconstruction":[62],"filters":[63],"are":[64],"needed":[65],"create":[67],"output":[68],"square":[69],"wave":[70],"signal.":[72]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
