{"id":"https://openalex.org/W4376606798","doi":"https://doi.org/10.1109/irps48203.2023.10117992","title":"Reliability Studies on Advanced FinFET Transistors of the Intel 4 CMOS Technology","display_name":"Reliability Studies on Advanced FinFET Transistors of the Intel 4 CMOS Technology","publication_year":2023,"publication_date":"2023-03-01","ids":{"openalex":"https://openalex.org/W4376606798","doi":"https://doi.org/10.1109/irps48203.2023.10117992"},"language":"en","primary_location":{"id":"doi:10.1109/irps48203.2023.10117992","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps48203.2023.10117992","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Reliability Physics Symposium (IRPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071640448","display_name":"Mubasher Jamil","orcid":"https://orcid.org/0000-0001-9662-1546"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"M. Jamil","raw_affiliation_strings":["Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052819330","display_name":"S. Mukhopadhay","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Mukhopadhay","raw_affiliation_strings":["Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031969431","display_name":"M. Ghoneim","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Ghoneim","raw_affiliation_strings":["Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109886853","display_name":"A. Shailos","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Shailos","raw_affiliation_strings":["Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085027810","display_name":"C. Prasad","orcid":"https://orcid.org/0000-0001-8786-5389"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Prasad","raw_affiliation_strings":["Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058069344","display_name":"Inanc Meric","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"I. Meric","raw_affiliation_strings":["Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027832758","display_name":"S. Ramey","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Ramey","raw_affiliation_strings":["Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Logic Technology Development Quality and Reliability,Hillsboro,Oregon,U.S.A.,97124","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5071640448"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.4023,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.58816159,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.800155758857727},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.701464056968689},{"id":"https://openalex.org/keywords/moores-law","display_name":"Moore's law","score":0.6767436265945435},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5352450609207153},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5346478819847107},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3681565523147583},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3243309259414673},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3075050413608551},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27629488706588745},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10920166969299316}],"concepts":[{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.800155758857727},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.701464056968689},{"id":"https://openalex.org/C206891323","wikidata":"https://www.wikidata.org/wiki/Q178655","display_name":"Moore's law","level":2,"score":0.6767436265945435},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5352450609207153},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5346478819847107},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3681565523147583},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3243309259414673},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3075050413608551},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27629488706588745},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10920166969299316},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/irps48203.2023.10117992","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps48203.2023.10117992","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Reliability Physics Symposium (IRPS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2787310733","https://openalex.org/W2799677856","https://openalex.org/W2946404829","https://openalex.org/W3040522405","https://openalex.org/W4286571725"],"related_works":["https://openalex.org/W2033512842","https://openalex.org/W4322734194","https://openalex.org/W1607054433","https://openalex.org/W3005535424","https://openalex.org/W4233600955","https://openalex.org/W2913665393","https://openalex.org/W2994319598","https://openalex.org/W2369695847","https://openalex.org/W2110842462","https://openalex.org/W4233757488"],"abstract_inverted_index":{"The":[0],"Intel":[1,26,70],"4":[2,27,71],"CMOS":[3],"FinFET":[4],"technology":[5,28,51,72],"delivers":[6],"over":[7,13,47],"20%":[8],"performance":[9,82],"gains":[10],"at":[11],"iso-power":[12],"the":[14,25,40,67],"prior":[15],"generation":[16],"(Intel":[17],"7).":[18],"This":[19,64],"paper":[20,65],"reports":[21,66],"reliability":[22,34,75],"studies":[23],"on":[24],"that":[29],"demonstrate":[30],"matched":[31],"or":[32],"better":[33],"while":[35,76],"extending":[36],"Moore's":[37],"law":[38],"in":[39,80],"areas":[41],"of":[42,59,69],"power,":[43],"performance,":[44,61],"and":[45,62,83],"scaling":[46,52],"its":[48],"predecessor.":[49],"Industry-leading":[50],"comes":[53],"with":[54,73],"numerous":[55],"challenges,":[56],"including":[57],"co-optimization":[58],"yield,":[60],"reliability.":[63],"development":[68],"industry-standard":[74],"delivering":[77],"significant":[78],"advancement":[79],"generational":[81],"density.":[84]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1}],"updated_date":"2026-03-01T06:05:34.837733","created_date":"2025-10-10T00:00:00"}