{"id":"https://openalex.org/W2946071588","doi":"https://doi.org/10.1109/irps.2019.8720471","title":"Assesment of CPI Stress Impact on IC Reliability and Performance in 2.5D/3D Packages","display_name":"Assesment of CPI Stress Impact on IC Reliability and Performance in 2.5D/3D Packages","publication_year":2019,"publication_date":"2019-03-01","ids":{"openalex":"https://openalex.org/W2946071588","doi":"https://doi.org/10.1109/irps.2019.8720471","mag":"2946071588"},"language":"en","primary_location":{"id":"doi:10.1109/irps.2019.8720471","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps.2019.8720471","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Reliability Physics Symposium (IRPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036199179","display_name":"Armen Kteyan","orcid":"https://orcid.org/0000-0002-8743-0155"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"A. Kteyan","raw_affiliation_strings":["Design-to-Silicon, Mentor, a Siemens Business, Yerevan, Armenia"],"affiliations":[{"raw_affiliation_string":"Design-to-Silicon, Mentor, a Siemens Business, Yerevan, Armenia","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000720628","display_name":"Henrik Hovsepyan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"H. Hovsepyan","raw_affiliation_strings":["Design-to-Silicon, Mentor, a Siemens Business, Yerevan, Armenia"],"affiliations":[{"raw_affiliation_string":"Design-to-Silicon, Mentor, a Siemens Business, Yerevan, Armenia","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089574594","display_name":"Jun-Ho Choy","orcid":"https://orcid.org/0000-0002-8977-5720"},"institutions":[{"id":"https://openalex.org/I4210137693","display_name":"Siemens (United States)","ror":"https://ror.org/04axb7e79","country_code":"US","type":"company","lineage":["https://openalex.org/I1325886976","https://openalex.org/I4210137693"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.-H. Choy","raw_affiliation_strings":["Design-to-Silicon, Mentor, a Siemens Business, Fremont, CA, USA"],"affiliations":[{"raw_affiliation_string":"Design-to-Silicon, Mentor, a Siemens Business, Fremont, CA, USA","institution_ids":["https://openalex.org/I4210137693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021627904","display_name":"Valeriy Sukharev","orcid":"https://orcid.org/0000-0002-5647-0584"},"institutions":[{"id":"https://openalex.org/I4210137693","display_name":"Siemens (United States)","ror":"https://ror.org/04axb7e79","country_code":"US","type":"company","lineage":["https://openalex.org/I1325886976","https://openalex.org/I4210137693"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"V. Sukharev","raw_affiliation_strings":["Design-to-Silicon, Mentor, a Siemens Business, Fremont, CA, USA"],"affiliations":[{"raw_affiliation_string":"Design-to-Silicon, Mentor, a Siemens Business, Fremont, CA, USA","institution_ids":["https://openalex.org/I4210137693"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5036199179"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3577,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.59820922,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10460","display_name":"Electronic Packaging and Soldering Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7129074335098267},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7002984881401062},{"id":"https://openalex.org/keywords/stress","display_name":"Stress (linguistics)","score":0.6047550439834595},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4858788847923279},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4661824405193329},{"id":"https://openalex.org/keywords/durability","display_name":"Durability","score":0.4648553133010864},{"id":"https://openalex.org/keywords/chip-scale-package","display_name":"Chip-scale package","score":0.46414294838905334},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.4556454122066498},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4275960624217987},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3875366151332855},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2573733329772949},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.0694308876991272}],"concepts":[{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7129074335098267},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7002984881401062},{"id":"https://openalex.org/C21036866","wikidata":"https://www.wikidata.org/wiki/Q181767","display_name":"Stress (linguistics)","level":2,"score":0.6047550439834595},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4858788847923279},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4661824405193329},{"id":"https://openalex.org/C104304963","wikidata":"https://www.wikidata.org/wiki/Q5316114","display_name":"Durability","level":2,"score":0.4648553133010864},{"id":"https://openalex.org/C126233035","wikidata":"https://www.wikidata.org/wiki/Q5101572","display_name":"Chip-scale package","level":3,"score":0.46414294838905334},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.4556454122066498},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4275960624217987},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3875366151332855},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2573733329772949},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0694308876991272},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/irps.2019.8720471","is_oa":false,"landing_page_url":"https://doi.org/10.1109/irps.2019.8720471","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Reliability Physics Symposium (IRPS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1549923431","https://openalex.org/W1583167721","https://openalex.org/W1972584722","https://openalex.org/W2002257666","https://openalex.org/W2043527044","https://openalex.org/W2100875042","https://openalex.org/W2102588501","https://openalex.org/W2107868198","https://openalex.org/W2586384915","https://openalex.org/W2604131602","https://openalex.org/W2621355936","https://openalex.org/W2765270631"],"related_works":["https://openalex.org/W2018755015","https://openalex.org/W3022507253","https://openalex.org/W2377520147","https://openalex.org/W4233448569","https://openalex.org/W2129522428","https://openalex.org/W3213269153","https://openalex.org/W2133092959","https://openalex.org/W2011815926","https://openalex.org/W1543593092","https://openalex.org/W3210715942"],"abstract_inverted_index":{"A":[0],"novel":[1],"approach":[2],"to":[3,56],"assessing":[4],"the":[5,24,30,53,65,72,86,100],"effects":[6],"of":[7,14,32,64,68,95],"CPI-induced":[8],"stresses":[9],"on":[10,71],"performance":[11],"and":[12,35,59,92],"durability":[13],"ICs":[15],"with":[16,29],"2.5D/3D":[17],"chip":[18],"architectures":[19],"is":[20,75,82],"presented.":[21],"It":[22],"combines":[23],"physics-based":[25],"stress":[26,40,46,73],"modeling":[27],"methodology":[28],"capabilities":[31],"layout":[33],"analysis":[34,94],"extraction":[36],"tools.":[37],"The":[38,77],"developed":[39],"simulation":[41],"flow":[42],"takes":[43],"into":[44],"account":[45],"variations":[47,67,87],"existing":[48],"in":[49,88,99],"different":[50],"scales":[51],"from":[52],"package":[54],"macro-scale":[55],"interconnect":[57,101],"segment":[58],"transistor":[60],"nano-scales.":[61],"An":[62],"impact":[63],"feature-scale":[66],"design":[69],"patterns":[70],"distribution":[74],"demonstrated.":[76],"obtained":[78],"across-chip":[79],"deformation":[80],"field":[81],"used":[83],"for":[84,93],"calculating":[85],"transistors'":[89],"electrical":[90],"characteristics,":[91],"potential":[96],"cracking":[97],"locations":[98],"layers.":[102]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}