{"id":"https://openalex.org/W4416249557","doi":"https://doi.org/10.1109/ijcnn64981.2025.11229400","title":"LHA: Layer-wise Hardware Acceleration of Progressive Quantizing Inference through Partial Reconfiguration for Edge Computing","display_name":"LHA: Layer-wise Hardware Acceleration of Progressive Quantizing Inference through Partial Reconfiguration for Edge Computing","publication_year":2025,"publication_date":"2025-06-30","ids":{"openalex":"https://openalex.org/W4416249557","doi":"https://doi.org/10.1109/ijcnn64981.2025.11229400"},"language":null,"primary_location":{"id":"doi:10.1109/ijcnn64981.2025.11229400","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn64981.2025.11229400","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 International Joint Conference on Neural Networks (IJCNN)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102536475","display_name":"Zongcheng Yue","orcid":null},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":true,"raw_author_name":"Zongcheng Yue","raw_affiliation_strings":["The University of Auckland,School of Computer Science,New Zealand"],"affiliations":[{"raw_affiliation_string":"The University of Auckland,School of Computer Science,New Zealand","institution_ids":["https://openalex.org/I154130895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030135913","display_name":"Longyu Ma","orcid":"https://orcid.org/0000-0002-0854-039X"},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Sean Longyu Ma","raw_affiliation_strings":["The University of Auckland,School of Computer Science,New Zealand"],"affiliations":[{"raw_affiliation_string":"The University of Auckland,School of Computer Science,New Zealand","institution_ids":["https://openalex.org/I154130895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025582832","display_name":"Chiu\u2010Wing Sham","orcid":"https://orcid.org/0000-0001-7007-6746"},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Chiu-Wing Sham","raw_affiliation_strings":["The University of Auckland,School of Computer Science,New Zealand"],"affiliations":[{"raw_affiliation_string":"The University of Auckland,School of Computer Science,New Zealand","institution_ids":["https://openalex.org/I154130895"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074242762","display_name":"Chong Fu","orcid":"https://orcid.org/0000-0002-4549-744X"},"institutions":[{"id":"https://openalex.org/I9224756","display_name":"Northeastern University","ror":"https://ror.org/03awzbc87","country_code":"CN","type":"education","lineage":["https://openalex.org/I9224756"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chong Fu","raw_affiliation_strings":["Northeastern University,School of Information Science and Engineering,China"],"affiliations":[{"raw_affiliation_string":"Northeastern University,School of Information Science and Engineering,China","institution_ids":["https://openalex.org/I9224756"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5102536475"],"corresponding_institution_ids":["https://openalex.org/I154130895"],"apc_list":null,"apc_paid":null,"fwci":1.304,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.86061771,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.8585000038146973,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.8585000038146973,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.03139999881386757,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12131","display_name":"Wireless Signal Modulation Classification","score":0.013899999670684338,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8098000288009644},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8061000108718872},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.7666000127792358},{"id":"https://openalex.org/keywords/edge-device","display_name":"Edge device","score":0.6834999918937683},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.6730999946594238},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.554099977016449},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.5281000137329102},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.5234000086784363}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8098000288009644},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8061000108718872},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.7666000127792358},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.761900007724762},{"id":"https://openalex.org/C138236772","wikidata":"https://www.wikidata.org/wiki/Q25098575","display_name":"Edge device","level":3,"score":0.6834999918937683},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.6730999946594238},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.554099977016449},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.5281000137329102},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.5234000086784363},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.4867999851703644},{"id":"https://openalex.org/C2778456923","wikidata":"https://www.wikidata.org/wiki/Q5337692","display_name":"Edge computing","level":3,"score":0.47749999165534973},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4708999991416931},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.448199987411499},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.40459999442100525},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.36469998955726624},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3517000079154968},{"id":"https://openalex.org/C127964446","wikidata":"https://www.wikidata.org/wiki/Q1092142","display_name":"Computational resource","level":3,"score":0.33959999680519104},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.3337000012397766},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3296999931335449},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.321399986743927},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3102000057697296},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.303600013256073},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.28700000047683716},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.27900001406669617},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.26649999618530273},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.265500009059906},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.25949999690055847}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ijcnn64981.2025.11229400","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ijcnn64981.2025.11229400","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 International Joint Conference on Neural Networks (IJCNN)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W2908009308","https://openalex.org/W2990526965","https://openalex.org/W3034644181","https://openalex.org/W3083008554","https://openalex.org/W3127801943","https://openalex.org/W3128120039","https://openalex.org/W3157647927","https://openalex.org/W3162993841","https://openalex.org/W3174071941","https://openalex.org/W3203475348","https://openalex.org/W4205884968","https://openalex.org/W4306685658","https://openalex.org/W4312037452","https://openalex.org/W4315473892","https://openalex.org/W4317795337","https://openalex.org/W4320712936","https://openalex.org/W4382318854","https://openalex.org/W4383501834","https://openalex.org/W4385377045","https://openalex.org/W4385627125","https://openalex.org/W4386710183","https://openalex.org/W4390097680","https://openalex.org/W4400230149","https://openalex.org/W4400811359","https://openalex.org/W4401386645","https://openalex.org/W4402352805","https://openalex.org/W4406265955"],"related_works":[],"abstract_inverted_index":{"As":[0],"the":[1,9,35,70],"need":[2],"for":[3,49,97],"real-time,":[4],"low-power":[5],"deep":[6],"learning":[7],"at":[8],"edge":[10,18,136],"increases,":[11],"efficient":[12],"hardware":[13,19,96],"acceleration":[14],"becomes":[15],"crucial.":[16],"Traditional":[17],"designs":[20],"often":[21],"scale":[22],"to":[23,67,93,111,119],"accommodate":[24],"neural":[25],"network":[26,73,100],"sizes,":[27],"which":[28],"can":[29],"degrade":[30],"overall":[31,121],"performance":[32,134],"by":[33],"taxing":[34],"hardware.":[36],"To":[37],"solve":[38],"this,":[39],"we":[40,83],"propose":[41],"a":[42],"novel":[43],"Layer-wise":[44],"Hardware":[45],"Acceleration":[46],"(LHA)":[47],"approach":[48],"Deep":[50],"Neural":[51],"Network":[52],"(DNN)":[53],"inference,":[54],"leveraging":[55],"progressive":[56,65],"quantization":[57,66],"and":[58,75,79,115],"Partial":[59],"Reconfiguration":[60],"(PR).":[61],"We":[62],"first":[63],"apply":[64],"systematically":[68],"reduce":[69],"bit-width":[71],"of":[72],"weights":[74],"activations,":[76],"lowering":[77],"computational":[78],"memory":[80],"demands.":[81],"Then,":[82],"utilize":[84],"Field":[85],"Programmable":[86],"Gate":[87],"Arrays":[88],"(FPGAs)":[89],"with":[90],"PR":[91],"capabilities":[92],"dynamically":[94],"reconfigure":[95],"each":[98,112],"quantized":[99],"layer":[101],"in":[102],"sequence.":[103],"This":[104],"method":[105],"optimizes":[106],"FPGA":[107],"resource":[108,129],"usage,":[109],"tailors":[110],"layer\u2019s":[113],"needs,":[114],"reallocates":[116],"freed":[117],"resources":[118],"boost":[120],"performance.":[122],"Experiments":[123],"show":[124],"that":[125],"LHA":[126],"significantly":[127],"enhances":[128],"efficiency":[130],"while":[131],"maintaining":[132],"inference":[133],"on":[135],"devices.":[137]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-03-26T15:22:09.906841","created_date":"2025-11-14T00:00:00"}
