{"id":"https://openalex.org/W4310732150","doi":"https://doi.org/10.1109/icta56932.2022.9963035","title":"Dynamically Reconfigurable Memory Address Mapping for General-Purpose Graphics Processing Unit","display_name":"Dynamically Reconfigurable Memory Address Mapping for General-Purpose Graphics Processing Unit","publication_year":2022,"publication_date":"2022-10-28","ids":{"openalex":"https://openalex.org/W4310732150","doi":"https://doi.org/10.1109/icta56932.2022.9963035"},"language":"en","primary_location":{"id":"doi:10.1109/icta56932.2022.9963035","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icta56932.2022.9963035","pdf_url":null,"source":{"id":"https://openalex.org/S4363608577","display_name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030888030","display_name":"Weiliang Chen","orcid":"https://orcid.org/0000-0003-0304-583X"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Weiliang Chen","raw_affiliation_strings":["Tsinghua University","Metax Tech Inc"],"affiliations":[{"raw_affiliation_string":"Tsinghua University","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Metax Tech Inc","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070301498","display_name":"Zhaoshi Li","orcid":"https://orcid.org/0000-0003-0786-9350"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zhaoshi Li","raw_affiliation_strings":["Metax Tech Inc"],"affiliations":[{"raw_affiliation_string":"Metax Tech Inc","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100358856","display_name":"Leibo Liu","orcid":"https://orcid.org/0000-0001-7548-4116"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Leibo Liu","raw_affiliation_strings":["Tsinghua University"],"affiliations":[{"raw_affiliation_string":"Tsinghua University","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032344424","display_name":"Shaojun Wei","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shaojun Wei","raw_affiliation_strings":["Tsinghua University"],"affiliations":[{"raw_affiliation_string":"Tsinghua University","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5030888030"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.14054601,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8810364007949829},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8002391457557678},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.5903650522232056},{"id":"https://openalex.org/keywords/graphics-processing-unit","display_name":"Graphics processing unit","score":0.5428822040557861},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.5203170776367188},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.4682154655456543},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.46618980169296265},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4412638545036316},{"id":"https://openalex.org/keywords/virtual-memory","display_name":"Virtual memory","score":0.4355945885181427},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43005266785621643},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4289679527282715},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.42481833696365356},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.37977951765060425},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33375319838523865},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2153562307357788},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14680880308151245}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8810364007949829},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8002391457557678},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.5903650522232056},{"id":"https://openalex.org/C2779851693","wikidata":"https://www.wikidata.org/wiki/Q183484","display_name":"Graphics processing unit","level":2,"score":0.5428822040557861},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.5203170776367188},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.4682154655456543},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.46618980169296265},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4412638545036316},{"id":"https://openalex.org/C76399640","wikidata":"https://www.wikidata.org/wiki/Q189401","display_name":"Virtual memory","level":4,"score":0.4355945885181427},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43005266785621643},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4289679527282715},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.42481833696365356},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.37977951765060425},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33375319838523865},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2153562307357788},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14680880308151245},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icta56932.2022.9963035","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icta56932.2022.9963035","pdf_url":null,"source":{"id":"https://openalex.org/S4363608577","display_name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.47999998927116394}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2026517532","https://openalex.org/W2884108789","https://openalex.org/W3137367312","https://openalex.org/W4243474409"],"related_works":["https://openalex.org/W2138847","https://openalex.org/W2381395788","https://openalex.org/W261562921","https://openalex.org/W3091560401","https://openalex.org/W1698699620","https://openalex.org/W2953954757","https://openalex.org/W2501039532","https://openalex.org/W1421493983","https://openalex.org/W4243164802","https://openalex.org/W4243333834"],"abstract_inverted_index":{"GPGPUs":[0],"utilize":[1],"multi-dimensional":[2,12],"memory":[3,22,27],"subsystems":[4],"to":[5,20,50,57,67,76,89,99],"provide":[6],"the":[7,26,53,58,61,69,78,91],"bandwidth":[8],"needed":[9],"by":[10],"their":[11],"parallelism.":[13],"However,":[14],"an":[15],"unfavorable":[16],"address":[17,54,72,80,93,105],"mapping":[18,38,55],"leads":[19],"imbalanced":[21],"request":[23],"distribution":[24],"across":[25],"resources,":[28],"causing":[29],"degraded":[30],"performance":[31,101],"and":[32,42],"poor":[33],"power":[34],"efficiency.":[35],"The":[36],"optimal":[37,79,92],"is":[39,74,87],"both":[40],"application-":[41],"hardware-dependent.":[43],"This":[44],"paper":[45],"provides":[46],"a":[47,65,83],"software-hardware":[48],"co-design":[49],"dynamically":[51],"reconfigure":[52],"according":[56],"trace":[59],"of":[60,71],"targeted":[62],"application.":[63],"First,":[64],"circuit":[66],"sample":[68],"entropy":[70],"bits":[73],"proposed":[75],"capture":[77],"mapping.":[81,94],"Second,":[82],"dynamic":[84],"reconfiguration":[85],"mechanism":[86],"designed":[88],"apply":[90],"Simulation":[95],"results":[96],"show":[97],"up":[98],"45%":[100],"improvement":[102],"over":[103],"fixed":[104],"mappings.":[106]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
