{"id":"https://openalex.org/W4310608679","doi":"https://doi.org/10.1109/icta56932.2022.9962990","title":"A Fully Synthesizable Injection Locked PLL with Dual-DCO Frequency Tracking in 55nm CMOS","display_name":"A Fully Synthesizable Injection Locked PLL with Dual-DCO Frequency Tracking in 55nm CMOS","publication_year":2022,"publication_date":"2022-10-28","ids":{"openalex":"https://openalex.org/W4310608679","doi":"https://doi.org/10.1109/icta56932.2022.9962990"},"language":"en","primary_location":{"id":"doi:10.1109/icta56932.2022.9962990","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icta56932.2022.9962990","pdf_url":null,"source":{"id":"https://openalex.org/S4363608577","display_name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063901975","display_name":"Xuanchi Yu","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xuanchi Yu","raw_affiliation_strings":["School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China"],"affiliations":[{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5104165277","display_name":"Yan Chen","orcid":"https://orcid.org/0000-0003-0043-4469"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yan Chen","raw_affiliation_strings":["School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China"],"affiliations":[{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078385852","display_name":"Gaofena Jin","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Gaofena Jin","raw_affiliation_strings":["School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China"],"affiliations":[{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057285383","display_name":"Fei Feng","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fei Feng","raw_affiliation_strings":["School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China"],"affiliations":[{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067068244","display_name":"Xun Luo","orcid":"https://orcid.org/0000-0002-1318-9418"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xun Luo","raw_affiliation_strings":["University of Electronic Science and Technology of China,Chengdu,China","University of Electronic Science and Technology of China, Chengdu, China"],"affiliations":[{"raw_affiliation_string":"University of Electronic Science and Technology of China,Chengdu,China","institution_ids":["https://openalex.org/I150229711"]},{"raw_affiliation_string":"University of Electronic Science and Technology of China, Chengdu, China","institution_ids":["https://openalex.org/I150229711"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050556000","display_name":"Xiang Gao","orcid":"https://orcid.org/0000-0003-3335-6620"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]},{"id":"https://openalex.org/I4210136793","display_name":"Peng Cheng Laboratory","ror":"https://ror.org/03qdqbt06","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210136793"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiang Gao","raw_affiliation_strings":["School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China","Peng Cheng Laboratory, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University,Hangzhou,China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"Peng Cheng Laboratory, Shenzhen, China","institution_ids":["https://openalex.org/I4210136793"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5063901975"],"corresponding_institution_ids":["https://openalex.org/I76130692"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.18424758,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"86","last_page":"87"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.9119748473167419},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9113430976867676},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8187625408172607},{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.5609148740768433},{"id":"https://openalex.org/keywords/dpll-algorithm","display_name":"DPLL algorithm","score":0.544383704662323},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46855124831199646},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.44972869753837585},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.43790778517723083},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4271141290664673},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.35405808687210083},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3107769191265106},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2167302966117859}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.9119748473167419},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9113430976867676},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8187625408172607},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.5609148740768433},{"id":"https://openalex.org/C143936061","wikidata":"https://www.wikidata.org/wiki/Q2030088","display_name":"DPLL algorithm","level":4,"score":0.544383704662323},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46855124831199646},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.44972869753837585},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.43790778517723083},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4271141290664673},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.35405808687210083},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3107769191265106},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2167302966117859},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icta56932.2022.9962990","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icta56932.2022.9962990","pdf_url":null,"source":{"id":"https://openalex.org/S4363608577","display_name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8700000047683716,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1989484081","https://openalex.org/W2291605840","https://openalex.org/W3081671533","https://openalex.org/W3085612199"],"related_works":["https://openalex.org/W1488060887","https://openalex.org/W2380467267","https://openalex.org/W1980525453","https://openalex.org/W2325206724","https://openalex.org/W1994021281","https://openalex.org/W2103754166","https://openalex.org/W2043945969","https://openalex.org/W2139484866","https://openalex.org/W2082469970","https://openalex.org/W2058003010"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,12,37,58],"fully":[4],"synthesizable":[5],"injection":[6],"locked":[7],"phase-locked":[8],"loop":[9],"(PLL),":[10],"with":[11,57],"dual-DCO":[13],"frequency":[14],"tracking.":[15],"The":[16,33],"design":[17],"has":[18],"been":[19],"fabricated":[20],"in":[21],"55-nm":[22],"CMOS":[23],"and":[24,67],"the":[25,68],"layout":[26],"is":[27,72],"realized":[28],"completely":[29],"by":[30],"digital":[31],"flows.":[32],"proposed":[34],"PLL":[35],"covers":[36],"0.2-to-1.2-GHz":[38],"tuning":[39],"range,":[40],"achieving":[41],"an":[42],"absolute":[43],"rms":[44],"jitter":[45],"(integrated":[46],"from":[47],"100kHz":[48],"to":[49],"100MHz)":[50],"of":[51,62,65],"3.2ps":[52],"at":[53],"4.3-mW":[54],"power":[55],"consumption,":[56],"corresponding":[59],"jitter-power":[60],"figure":[61],"merit":[63],"(FoM)":[64],"-224dB":[66],"occupied":[69],"core":[70],"area":[71],"only":[73],"0.0225":[74],"mm":[75],"<sup":[76],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[77],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[78],".":[79]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
