{"id":"https://openalex.org/W4323824523","doi":"https://doi.org/10.1109/iceic57457.2023.10049948","title":"Eight-bit Quantization for Super-Resolution Networks and Its Hardware Implementation","display_name":"Eight-bit Quantization for Super-Resolution Networks and Its Hardware Implementation","publication_year":2023,"publication_date":"2023-02-05","ids":{"openalex":"https://openalex.org/W4323824523","doi":"https://doi.org/10.1109/iceic57457.2023.10049948"},"language":"en","primary_location":{"id":"doi:10.1109/iceic57457.2023.10049948","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iceic57457.2023.10049948","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 International Conference on Electronics, Information, and Communication (ICEIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014900695","display_name":"Xuan Truong Nguyen","orcid":"https://orcid.org/0000-0002-7527-6971"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Xuan Truong Nguyen","raw_affiliation_strings":["Seoul National University,Department of Electrical and Computer Engineering,Seoul,Korea","Department of Electrical and Computer Engineering, Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Seoul National University,Department of Electrical and Computer Engineering,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053096198","display_name":"Younghoon Ko","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Younghoon Ko","raw_affiliation_strings":["Seoul National University,Department of Electrical and Computer Engineering,Seoul,Korea","Department of Electrical and Computer Engineering, Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Seoul National University,Department of Electrical and Computer Engineering,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101562535","display_name":"Tuan Nghia Nguyen","orcid":"https://orcid.org/0000-0003-2130-4364"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Tuan Nghia Nguyen","raw_affiliation_strings":["Seoul National University,Department of Electrical and Computer Engineering,Seoul,Korea","Department of Electrical and Computer Engineering, Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Seoul National University,Department of Electrical and Computer Engineering,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024723558","display_name":"Hyuk\u2010Jae Lee","orcid":"https://orcid.org/0000-0001-6811-9647"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyuk-Jae Lee","raw_affiliation_strings":["Seoul National University,Department of Electrical and Computer Engineering,Seoul,Korea","Department of Electrical and Computer Engineering, Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Seoul National University,Department of Electrical and Computer Engineering,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039863333","display_name":"Kyujoong Lee","orcid":"https://orcid.org/0000-0002-3080-3010"},"institutions":[{"id":"https://openalex.org/I165677929","display_name":"Sungshin Women's University","ror":"https://ror.org/0500xzf72","country_code":"KR","type":"education","lineage":["https://openalex.org/I165677929"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyujoong Lee","raw_affiliation_strings":["Sungshin Women’s University,School of AI Convergence,Seoul,Korea"],"affiliations":[{"raw_affiliation_string":"Sungshin Women’s University,School of AI Convergence,Seoul,Korea","institution_ids":["https://openalex.org/I165677929"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5014900695"],"corresponding_institution_ids":["https://openalex.org/I139264467"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0148589,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10688","display_name":"Image and Signal Denoising Methods","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8010699152946472},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.7793309688568115},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6930022239685059},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.6540238857269287},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5516178607940674},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.480866014957428},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.4378758668899536},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.43227845430374146},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4013919532299042},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3267250657081604},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.18597322702407837},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.1752679944038391},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.10358557105064392}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8010699152946472},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.7793309688568115},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6930022239685059},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.6540238857269287},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5516178607940674},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.480866014957428},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.4378758668899536},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.43227845430374146},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4013919532299042},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3267250657081604},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.18597322702407837},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.1752679944038391},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.10358557105064392},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iceic57457.2023.10049948","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iceic57457.2023.10049948","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 International Conference on Electronics, Information, and Communication (ICEIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320337495","display_name":"Technology Development","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1791560514","https://openalex.org/W2476548250","https://openalex.org/W2503339013","https://openalex.org/W2798838583","https://openalex.org/W2886623847","https://openalex.org/W2963122961","https://openalex.org/W2987086740","https://openalex.org/W3047237654","https://openalex.org/W4294691367"],"related_works":["https://openalex.org/W2136295006","https://openalex.org/W2165480138","https://openalex.org/W2107240870","https://openalex.org/W2107517480","https://openalex.org/W4210326786","https://openalex.org/W4231001357","https://openalex.org/W2131024837","https://openalex.org/W2539742022","https://openalex.org/W2063218591","https://openalex.org/W2117342402"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"an":[3],"8-bit":[4,21],"quantization":[5,41],"scheme":[6,42,60],"for":[7],"super-resolution":[8],"(SR)":[9],"networks":[10],"and":[11,55,66,86],"its":[12],"hardware":[13],"implementation.":[14],"Quantizing":[15],"SR":[16],"models":[17],"to":[18,28],"run":[19],"in":[20],"is":[22,61,69],"a":[23,40],"non-trial":[24],"task,":[25],"frequently":[26],"leading":[27],"non-negligible":[29],"restoration":[30],"performance":[31],"degradation.":[32],"To":[33],"address":[34],"the":[35,50,58,67,84,89],"problem,":[36],"we":[37],"first":[38],"present":[39],"that":[43],"mitigates":[44],"accuracy":[45],"drop":[46],"by":[47],"effectively":[48],"capturing":[49],"distributions":[51],"of":[52,88],"both":[53],"weights":[54],"activations.":[56],"Second,":[57],"proposed":[59,90],"implemented":[62],"using":[63,75],"Verilog":[64],"HDL":[65],"design":[68],"synthesized":[70],"on":[71],"Synopsys":[72],"Design":[73],"Compiler":[74],"TSMC":[76],"65":[77],"nm":[78],"library.":[79],"Lastly,":[80],"experimental":[81],"results":[82],"illustrate":[83],"effectiveness":[85],"efficiency":[87],"method.":[91]},"counts_by_year":[],"updated_date":"2025-12-22T23:10:17.713674","created_date":"2025-10-10T00:00:00"}