{"id":"https://openalex.org/W4417169614","doi":"https://doi.org/10.1109/icecs66544.2025.11270804","title":"Leveraging Convolutional Autoencoders for Post-Layout Performance Estimation of Analog ICs","display_name":"Leveraging Convolutional Autoencoders for Post-Layout Performance Estimation of Analog ICs","publication_year":2025,"publication_date":"2025-11-17","ids":{"openalex":"https://openalex.org/W4417169614","doi":"https://doi.org/10.1109/icecs66544.2025.11270804"},"language":null,"primary_location":{"id":"doi:10.1109/icecs66544.2025.11270804","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270804","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080345104","display_name":"Carlos Almeida","orcid":"https://orcid.org/0000-0001-5523-075X"},"institutions":[{"id":"https://openalex.org/I110026055","display_name":"Iscte \u2013 Instituto Universit\u00e1rio de Lisboa","ror":"https://ror.org/014837179","country_code":"PT","type":"education","lineage":["https://openalex.org/I110026055"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Carlos Almeida","raw_affiliation_strings":["Universidade de Lisboa,Instituto Superior T&#x00E9;cnico,Portugal"],"affiliations":[{"raw_affiliation_string":"Universidade de Lisboa,Instituto Superior T&#x00E9;cnico,Portugal","institution_ids":["https://openalex.org/I110026055","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004115272","display_name":"Marco Ant\u00f4nio de Oliveira","orcid":"https://orcid.org/0000-0001-9204-8121"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Marco Oliveira","raw_affiliation_strings":["Synopsys,Portugal"],"affiliations":[{"raw_affiliation_string":"Synopsys,Portugal","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100705834","display_name":"Lihong Zhang","orcid":"https://orcid.org/0000-0003-0183-3517"},"institutions":[{"id":"https://openalex.org/I130438778","display_name":"Memorial University of Newfoundland","ror":"https://ror.org/04haebc03","country_code":"CA","type":"education","lineage":["https://openalex.org/I130438778"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Lihong Zhang","raw_affiliation_strings":["Memorial University of Newfoundland,St. John&#x2019;s,Canada"],"affiliations":[{"raw_affiliation_string":"Memorial University of Newfoundland,St. John&#x2019;s,Canada","institution_ids":["https://openalex.org/I130438778"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059744750","display_name":"Ricardo Evandro Santos Martins","orcid":"https://orcid.org/0000-0001-8648-1260"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I110026055","display_name":"Iscte \u2013 Instituto Universit\u00e1rio de Lisboa","ror":"https://ror.org/014837179","country_code":"PT","type":"education","lineage":["https://openalex.org/I110026055"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Ricardo Martins","raw_affiliation_strings":["Universidade de Lisboa,Instituto Superior T&#x00E9;cnico,Portugal"],"affiliations":[{"raw_affiliation_string":"Universidade de Lisboa,Instituto Superior T&#x00E9;cnico,Portugal","institution_ids":["https://openalex.org/I110026055","https://openalex.org/I141596103"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5080345104"],"corresponding_institution_ids":["https://openalex.org/I110026055","https://openalex.org/I141596103"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.3871812,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.953000009059906,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.953000009059906,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.02250000089406967,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.0044999998062849045,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.7407000064849854},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.5871000289916992},{"id":"https://openalex.org/keywords/pattern-recognition","display_name":"Pattern recognition (psychology)","score":0.5264999866485596},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.5012999773025513},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.4966000020503998},{"id":"https://openalex.org/keywords/feature","display_name":"Feature (linguistics)","score":0.47769999504089355},{"id":"https://openalex.org/keywords/feature-extraction","display_name":"Feature extraction","score":0.4763999879360199},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.4569000005722046}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7757999897003174},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.7407000064849854},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.682699978351593},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.5871000289916992},{"id":"https://openalex.org/C153180895","wikidata":"https://www.wikidata.org/wiki/Q7148389","display_name":"Pattern recognition (psychology)","level":2,"score":0.5264999866485596},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.5012999773025513},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.4966000020503998},{"id":"https://openalex.org/C2776401178","wikidata":"https://www.wikidata.org/wiki/Q12050496","display_name":"Feature (linguistics)","level":2,"score":0.47769999504089355},{"id":"https://openalex.org/C52622490","wikidata":"https://www.wikidata.org/wiki/Q1026626","display_name":"Feature extraction","level":2,"score":0.4763999879360199},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.4569000005722046},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.4458000063896179},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.4399000108242035},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.4284999966621399},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.38609999418258667},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.3776000142097473},{"id":"https://openalex.org/C8038995","wikidata":"https://www.wikidata.org/wiki/Q1152135","display_name":"Unsupervised learning","level":2,"score":0.3537999987602234},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.34540000557899475},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.27459999918937683},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.27129998803138733},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.2687000036239624}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs66544.2025.11270804","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270804","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320320995","display_name":"Canada Foundation for Innovation","ror":"https://ror.org/000az4664"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2940735040","https://openalex.org/W2945462300","https://openalex.org/W2949676527","https://openalex.org/W3036164688","https://openalex.org/W4283708931","https://openalex.org/W4362714748","https://openalex.org/W4388125458","https://openalex.org/W4390693485","https://openalex.org/W4393146755","https://openalex.org/W4400232357","https://openalex.org/W4403331456","https://openalex.org/W4404105963","https://openalex.org/W4404238753","https://openalex.org/W4405490664","https://openalex.org/W4407317174"],"related_works":[],"abstract_inverted_index":{"State-Of-the-art":[0],"layout-aware":[1],"synthesis":[2],"methods":[3],"for":[4,56,123],"analog":[5,61,92,130],"integrated":[6],"circuits":[7],"(ICs)":[8],"rely":[9],"extensively":[10],"on":[11,44,106],"off-the-shelf":[12],"layout":[13],"extractions":[14],"and":[15,104,148],"post-layout":[16,40],"simulations":[17],"to":[18,89],"assess":[19],"the":[20,35,80,84,95,98,102,107,111,133,144],"circuits\u2019":[21],"functional":[22,108],"behavior,":[23],"incurring":[24],"prohibitive":[25],"optimization":[26],"time.":[27],"To":[28],"address":[29],"this":[30,32],"challenge,":[31],"paper":[33],"proposes":[34],"development":[36],"of":[37,70,86,101,110,127],"a":[38,64,68,128],"novel":[39],"performance":[41,76,125],"regressor":[42],"based":[43],"deep":[45],"learning":[46],"(DL)":[47],"models.":[48],"Specifically,":[49],"convolutional":[50,87],"variational":[51],"autoencoders":[52],"(CVAEs)":[53],"are":[54],"applied":[55],"unsupervised":[57],"feature":[58],"extraction":[59,147],"from":[60,79],"layouts,":[62,94],"producing":[63],"latent":[65],"space.":[66,82],"Then,":[67],"collection":[69],"artificial":[71],"neural":[72],"networks":[73],"(ANNs)":[74],"conducts":[75],"estimation":[77],"directly":[78],"lower-dimensional":[81],"By":[83],"usage":[85],"layers":[88],"deal":[90],"with":[91,132],"IC":[93],"model":[96,134],"learns":[97],"underlying":[99],"impact":[100],"floorplan":[103],"interconnects":[105],"behavior":[109],"circuit.":[112],"Preliminary":[113],"results":[114],"reveal":[115],"mean":[116],"absolute":[117],"percentage":[118],"errors":[119],"(MAPEs)":[120],"below":[121],"2%":[122],"different":[124],"metrics":[126],"typical":[129],"structure,":[131],"inference":[135],"requiring":[136],"only":[137],"3.9":[138],"milliseconds,":[139],"about":[140],"3,000\u00d7":[141],"faster":[142],"than":[143],"full":[145],"parasitic":[146],"simulation.":[149]},"counts_by_year":[],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2025-12-09T00:00:00"}
