{"id":"https://openalex.org/W4417169654","doi":"https://doi.org/10.1109/icecs66544.2025.11270516","title":"A Reading Scheme for 3T3R RRAM and Their Arrays Recognizing 64 States","display_name":"A Reading Scheme for 3T3R RRAM and Their Arrays Recognizing 64 States","publication_year":2025,"publication_date":"2025-11-17","ids":{"openalex":"https://openalex.org/W4417169654","doi":"https://doi.org/10.1109/icecs66544.2025.11270516"},"language":"en","primary_location":{"id":"doi:10.1109/icecs66544.2025.11270516","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270516","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036283833","display_name":"Running Guo","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Running Guo","raw_affiliation_strings":["Technical University of Munich,Chair of Micro- and Nanosystems Technology,Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Munich,Chair of Micro- and Nanosystems Technology,Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056540006","display_name":"Stefan Pechmann","orcid":"https://orcid.org/0000-0001-6890-3378"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stefan Pechmann","raw_affiliation_strings":["Technical University of Munich,Chair of Micro- and Nanosystems Technology,Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Munich,Chair of Micro- and Nanosystems Technology,Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034209342","display_name":"Amelie Hagelauer","orcid":"https://orcid.org/0000-0001-9113-9531"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Amelie Hagelauer","raw_affiliation_strings":["Technical University of Munich,Chair of Micro- and Nanosystems Technology,Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Munich,Chair of Micro- and Nanosystems Technology,Germany","institution_ids":["https://openalex.org/I62916508"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5036283833"],"corresponding_institution_ids":["https://openalex.org/I62916508"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.38721891,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9894000291824341,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9894000291824341,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.006200000178068876,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.0010000000474974513,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.8621000051498413},{"id":"https://openalex.org/keywords/reading","display_name":"Reading (process)","score":0.6801999807357788},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.6621999740600586},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5178999900817871},{"id":"https://openalex.org/keywords/resistive-touchscreen","display_name":"Resistive touchscreen","score":0.48570001125335693}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.8621000051498413},{"id":"https://openalex.org/C554936623","wikidata":"https://www.wikidata.org/wiki/Q199657","display_name":"Reading (process)","level":2,"score":0.6801999807357788},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.6621999740600586},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.656000018119812},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5178999900817871},{"id":"https://openalex.org/C6899612","wikidata":"https://www.wikidata.org/wiki/Q852911","display_name":"Resistive touchscreen","level":2,"score":0.48570001125335693},{"id":"https://openalex.org/C18762648","wikidata":"https://www.wikidata.org/wiki/Q42213","display_name":"Work (physics)","level":2,"score":0.38040000200271606},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.37929999828338623},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.36390000581741333},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.328900009393692},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2922999858856201},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.28439998626708984},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2547000050544739},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.25279998779296875}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs66544.2025.11270516","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270516","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},{"id":"pmh:oai:publica.fraunhofer.de:publica/501883","is_oa":false,"landing_page_url":"https://publica.fraunhofer.de/handle/publica/501883","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"conference paper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320322835","display_name":"Ministry of Economic Affairs","ror":"https://ror.org/042ge0913"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2110276925","https://openalex.org/W2181570267","https://openalex.org/W3018945530","https://openalex.org/W4285266653","https://openalex.org/W4310449176","https://openalex.org/W4390693311","https://openalex.org/W4409580918"],"related_works":[],"abstract_inverted_index":{"Resistive":[0],"random-access":[1],"memory":[2],"(RRAM)":[3],"has":[4],"attracted":[5],"significant":[6],"interest":[7],"due":[8],"to":[9,43],"its":[10],"promising":[11],"characteristics.":[12],"This":[13],"work":[14],"introduces":[15],"a":[16,23],"three-transistor":[17],"three-resistor":[18],"(3T3R)":[19],"architecture,":[20],"accompanied":[21],"by":[22],"novel":[24],"readout":[25],"strategy":[26],"specifically":[27],"designed":[28],"for":[29,80],"this":[30],"structure.":[31],"The":[32,71],"proposed":[33],"method":[34],"significantly":[35],"expands":[36],"the":[37],"number":[38],"of":[39,56,64,77],"accessible":[40],"states":[41,59],"compared":[42],"conventional":[44],"read":[45,68,73],"circuits":[46],"used":[47],"with":[48],"one-transistor":[49],"one-resistor":[50],"(1T1R)":[51],"RRAM":[52],"cells.":[53],"A":[54],"total":[55],"64":[57],"distinct":[58],"can":[60,66],"be":[61,67],"generated,":[62],"each":[63],"which":[65],"within":[69],"18ns.":[70],"complete":[72],"operation":[74],"consumes":[75],"66.67\u00b5W":[76],"power,":[78],"accounting":[79],"all":[81],"components.":[82]},"counts_by_year":[],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2025-12-09T00:00:00"}
