{"id":"https://openalex.org/W2786363593","doi":"https://doi.org/10.1109/icecs.2017.8292089","title":"An 8 bits 2GS/s ADC in 180 nm CMOS process for healthcare multichannel instruments","display_name":"An 8 bits 2GS/s ADC in 180 nm CMOS process for healthcare multichannel instruments","publication_year":2017,"publication_date":"2017-12-01","ids":{"openalex":"https://openalex.org/W2786363593","doi":"https://doi.org/10.1109/icecs.2017.8292089","mag":"2786363593"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2017.8292089","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2017.8292089","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032691149","display_name":"Gabriel Puech","orcid":null},"institutions":[{"id":"https://openalex.org/I4210102222","display_name":"Laboratoire de Physique Corpusculaire","ror":"https://ror.org/0214k6v65","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I198244214","https://openalex.org/I4210102222"]},{"id":"https://openalex.org/I4210133362","display_name":"Institut National de Physique Nucl\u00e9aire et de Physique des Particules","ror":"https://ror.org/03fd77x13","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I4210133362"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Gabriel Puech","raw_affiliation_strings":["IN2P3, Laboratoire de Physique de Clermont Aubiere Cedex, France"],"affiliations":[{"raw_affiliation_string":"IN2P3, Laboratoire de Physique de Clermont Aubiere Cedex, France","institution_ids":["https://openalex.org/I4210102222","https://openalex.org/I4210133362"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5032691149"],"corresponding_institution_ids":["https://openalex.org/I4210102222","https://openalex.org/I4210133362"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19782804,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"86","issue":null,"first_page":"13","last_page":"16"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.6360623836517334},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.5970644950866699},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.5627301335334778},{"id":"https://openalex.org/keywords/flash-adc","display_name":"Flash ADC","score":0.5616247653961182},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5256158709526062},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5017740726470947},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.49480170011520386},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4833347499370575},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.4593600928783417},{"id":"https://openalex.org/keywords/interpolation","display_name":"Interpolation (computer graphics)","score":0.4516812562942505},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.4380584955215454},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.4364529252052307},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.37411898374557495},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.29553601145744324},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2629168629646301},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2618967294692993},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.2165537178516388},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1551779806613922},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08728045225143433},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.08314061164855957}],"concepts":[{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.6360623836517334},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.5970644950866699},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.5627301335334778},{"id":"https://openalex.org/C164862427","wikidata":"https://www.wikidata.org/wiki/Q2744647","display_name":"Flash ADC","level":4,"score":0.5616247653961182},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5256158709526062},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5017740726470947},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.49480170011520386},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4833347499370575},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.4593600928783417},{"id":"https://openalex.org/C137800194","wikidata":"https://www.wikidata.org/wiki/Q11713455","display_name":"Interpolation (computer graphics)","level":3,"score":0.4516812562942505},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.4380584955215454},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.4364529252052307},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.37411898374557495},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29553601145744324},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2629168629646301},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2618967294692993},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.2165537178516388},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1551779806613922},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08728045225143433},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08314061164855957},{"id":"https://openalex.org/C104114177","wikidata":"https://www.wikidata.org/wiki/Q79782","display_name":"Motion (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2017.8292089","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2017.8292089","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1982775695","https://openalex.org/W2047126386","https://openalex.org/W2091450977","https://openalex.org/W2113613496","https://openalex.org/W2133292840","https://openalex.org/W2181733253","https://openalex.org/W2288371132","https://openalex.org/W2528278964","https://openalex.org/W2548163564","https://openalex.org/W2740128951","https://openalex.org/W6677046915","https://openalex.org/W6685884464"],"related_works":["https://openalex.org/W4386261925","https://openalex.org/W2048420745","https://openalex.org/W2082944690","https://openalex.org/W2263373136","https://openalex.org/W1914349328","https://openalex.org/W2160067645","https://openalex.org/W2023334077","https://openalex.org/W3123985664","https://openalex.org/W1537313130","https://openalex.org/W2000006012"],"abstract_inverted_index":{"An":[0],"8":[1,109],"bit":[2],"2":[3,113],"giga":[4],"samples":[5],"per":[6],"second":[7],"(GS/s)":[8],"differential":[9],"flash":[10],"ADC":[11],"architecture":[12],"design":[13,56],"is":[14,105],"presented.":[15,35],"The":[16,102],"several":[17],"blocs":[18],"consisting":[19],"of":[20,44,57,96,129],"a":[21],"comparator":[22],"latch,":[23],"its":[24],"preamplifier":[25],"and":[26,34,40,64,77,87,93,108,111],"the":[27,51,97,112],"thermometer":[28],"to":[29,126],"binary":[30],"(T2B)":[31],"are":[32,100],"discussed":[33],"Several":[36],"techniques":[37],"were":[38],"combined":[39],"validated.":[41],"These":[42],"consist":[43],"an":[45,94,127],"internal":[46],"quantification":[47],"threshold":[48],"embedded":[49],"in":[50],"transistors":[52],"sizing,":[53],"full":[54],"custom":[55],"pass":[58],"gate":[59],"complementary":[60],"logic":[61],"cells,":[62],"interpolation":[63],"common":[65],"drain":[66],"source":[67],"followers":[68],"(CDSF)":[69],"pairs.":[70],"This":[71],"CDSF":[72],"pair":[73],"act":[74],"as":[75],"signal":[76],"reference":[78],"shifters.":[79],"Schematics,":[80],"simulation":[81],"results":[82,124],"with":[83,132],"Monte":[84,120],"Carlo":[85,121],"sampling":[86,115],"layout":[88,99],"dependent":[89],"effects":[90],"(LDE)":[91],"extraction":[92],"overview":[95],"ASIC":[98],"shown.":[101],"effective":[103],"resolution":[104],"between":[106],"7":[107],"bits":[110],"GHz":[114],"rate":[116],"have":[117],"been":[118],"reached.":[119],"mismatch":[122],"analysis":[123],"leads":[125],"expectation":[128],"95%":[130],"yield":[131],"this":[133],"ENOB.":[134]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
