{"id":"https://openalex.org/W2308211091","doi":"https://doi.org/10.1109/icecs.2015.7440393","title":"Parallel overloaded CDMA interconnect (OCI) bus architecture for on-chip communications","display_name":"Parallel overloaded CDMA interconnect (OCI) bus architecture for on-chip communications","publication_year":2015,"publication_date":"2015-12-01","ids":{"openalex":"https://openalex.org/W2308211091","doi":"https://doi.org/10.1109/icecs.2015.7440393","mag":"2308211091"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2015.7440393","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2015.7440393","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101730050","display_name":"Khaled E. Ahmed","orcid":"https://orcid.org/0000-0001-9946-1162"},"institutions":[{"id":"https://openalex.org/I84524832","display_name":"Alexandria University","ror":"https://ror.org/00mzz1w90","country_code":"EG","type":"education","lineage":["https://openalex.org/I84524832"]}],"countries":["EG"],"is_corresponding":true,"raw_author_name":"Khaled E. Ahmed","raw_affiliation_strings":["Electrical Engineering Department, Alexandria University, Alexandria, Egypt"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, Alexandria University, Alexandria, Egypt","institution_ids":["https://openalex.org/I84524832"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022893014","display_name":"Mohammed M. Farag","orcid":"https://orcid.org/0000-0002-0739-3631"},"institutions":[{"id":"https://openalex.org/I84524832","display_name":"Alexandria University","ror":"https://ror.org/00mzz1w90","country_code":"EG","type":"education","lineage":["https://openalex.org/I84524832"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Mohammed M. Farag","raw_affiliation_strings":["Electrical Engineering Department, Alexandria University, Alexandria, Egypt"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, Alexandria University, Alexandria, Egypt","institution_ids":["https://openalex.org/I84524832"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101730050"],"corresponding_institution_ids":["https://openalex.org/I84524832"],"apc_list":null,"apc_paid":null,"fwci":0.6656,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.76218765,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"621","last_page":"624"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9950000047683716,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/time-division-multiple-access","display_name":"Time division multiple access","score":0.720603346824646},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6856064796447754},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.621759831905365},{"id":"https://openalex.org/keywords/code-division-multiple-access","display_name":"Code division multiple access","score":0.5884674787521362},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.5031833052635193},{"id":"https://openalex.org/keywords/bus-network","display_name":"Bus network","score":0.49973082542419434},{"id":"https://openalex.org/keywords/local-bus","display_name":"Local bus","score":0.4960876405239105},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.462024062871933},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45126134157180786},{"id":"https://openalex.org/keywords/system-bus","display_name":"System bus","score":0.4390583336353302},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.42959317564964294},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4195968508720398},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38060179352760315},{"id":"https://openalex.org/keywords/control-bus","display_name":"Control bus","score":0.34384459257125854},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22028020024299622},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15315377712249756}],"concepts":[{"id":"https://openalex.org/C117313154","wikidata":"https://www.wikidata.org/wiki/Q878344","display_name":"Time division multiple access","level":2,"score":0.720603346824646},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6856064796447754},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.621759831905365},{"id":"https://openalex.org/C47696715","wikidata":"https://www.wikidata.org/wiki/Q233394","display_name":"Code division multiple access","level":2,"score":0.5884674787521362},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.5031833052635193},{"id":"https://openalex.org/C54609922","wikidata":"https://www.wikidata.org/wiki/Q748329","display_name":"Bus network","level":4,"score":0.49973082542419434},{"id":"https://openalex.org/C202015219","wikidata":"https://www.wikidata.org/wiki/Q6664300","display_name":"Local bus","level":4,"score":0.4960876405239105},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.462024062871933},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45126134157180786},{"id":"https://openalex.org/C136321198","wikidata":"https://www.wikidata.org/wiki/Q2377054","display_name":"System bus","level":2,"score":0.4390583336353302},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.42959317564964294},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4195968508720398},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38060179352760315},{"id":"https://openalex.org/C203315745","wikidata":"https://www.wikidata.org/wiki/Q2235486","display_name":"Control bus","level":3,"score":0.34384459257125854},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22028020024299622},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15315377712249756}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2015.7440393","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2015.7440393","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/8","score":0.4000000059604645,"display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1595370658","https://openalex.org/W1975266815","https://openalex.org/W1987239533","https://openalex.org/W1995749881","https://openalex.org/W2119677480","https://openalex.org/W2142232990","https://openalex.org/W2151561617","https://openalex.org/W2291528885","https://openalex.org/W2504855616","https://openalex.org/W4230591943","https://openalex.org/W6677632535"],"related_works":["https://openalex.org/W2387146226","https://openalex.org/W4255235451","https://openalex.org/W70103254","https://openalex.org/W51382759","https://openalex.org/W2404980846","https://openalex.org/W2362390174","https://openalex.org/W2352926601","https://openalex.org/W2388085031","https://openalex.org/W2614336368","https://openalex.org/W4244800129"],"abstract_inverted_index":{"On-chip":[0],"interconnects":[1,53],"are":[2,15],"the":[3,16,74,83,108,117,124,131,140,146,156,169,185,189],"performance":[4],"bottleneck":[5],"in":[6,51,71,143],"modern":[7],"System-on-Chips":[8],"(SoCs).":[9],"Bus":[10],"topologies":[11,122],"and":[12,103,115,119,135,138,149],"Networks-on-Chip":[13],"(NoCs)":[14],"main":[17],"approaches":[18],"used":[19],"to":[20,47,106,168,184],"implement":[21,114],"on-chip":[22,52],"communication.":[23],"The":[24,152,174],"interconnect":[25,96,111],"fabric":[26],"enables":[27],"resource":[28,49,147,165,193],"sharing":[29,50],"by":[30,60,81],"Time":[31],"and/or":[32],"Space":[33],"Division":[34,40],"Multiple":[35,41,84],"Access":[36,42,85],"(T/SDMA)":[37],"techniques.":[38],"Code":[39],"(CDMA)":[43],"has":[44],"been":[45],"proposed":[46],"enable":[48],"where":[54],"each":[55],"data":[56],"bit":[57],"is":[58],"spread":[59],"a":[61],"unique":[62],"orthogonal":[63],"spreading":[64],"code":[65],"of":[66,145,191],"length":[67],"N.":[68],"Unlike":[69],"T/SDMA,":[70],"wireless":[72],"CDMA,":[73],"communication":[75],"channel":[76],"capacity":[77],"can":[78],"be":[79],"increased":[80,192],"overcoming":[82],"Interference":[86],"(MAI)":[87],"problem.":[88],"In":[89],"response,":[90],"we":[91],"present":[92],"two":[93],"overload":[94],"CDMA":[95,110,136,171],"(OCI)":[97],"bus":[98,121,150,161,172,176,181,187],"architectures,":[99],"namely":[100],"TDMA-OCI":[101],"(T-OCI)":[102],"Parallel-OCI":[104],"(P-OCI)":[105],"increase":[107],"classical":[109],"capacity.":[112],"We":[113,129],"validate":[116],"T-OCI":[118,157,186],"P-OCI":[120,175],"on":[123],"Xilinx":[125],"Artix-7":[126],"AC701":[127],"kit.":[128],"compare":[130],"basic":[132],"SDMA,":[133],"TDMA,":[134],"buses":[137,142],"evaluate":[139],"OCI":[141],"terms":[144],"utilization":[148,166],"bandwidth.":[151],"results":[153],"show":[154],"that":[155],"achieve":[158],"100%":[159],"higher":[160,180],"capacity,":[162],"31%":[163],"less":[164],"compared":[167,183],"conventional":[170],"topology.":[173],"provides":[177],"N":[178],"times":[179],"bandwidth":[182],"at":[188],"expense":[190],"utilization.":[194]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2016,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}