{"id":"https://openalex.org/W2306682566","doi":"https://doi.org/10.1109/icecs.2015.7440351","title":"Procedural analog design automation using building block optimization","display_name":"Procedural analog design automation using building block optimization","publication_year":2015,"publication_date":"2015-12-01","ids":{"openalex":"https://openalex.org/W2306682566","doi":"https://doi.org/10.1109/icecs.2015.7440351","mag":"2306682566"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2015.7440351","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2015.7440351","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045586899","display_name":"Maged El-Sisi","orcid":null},"institutions":[{"id":"https://openalex.org/I105695857","display_name":"Siemens (Hungary)","ror":"https://ror.org/01rk7mv85","country_code":"HU","type":"company","lineage":["https://openalex.org/I105695857","https://openalex.org/I1325886976"]},{"id":"https://openalex.org/I4210099704","display_name":"Mentor","ror":"https://ror.org/016grqh48","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210099704"]}],"countries":["GB","HU"],"is_corresponding":true,"raw_author_name":"Maged El-Sisi","raw_affiliation_strings":["Mentor Graphics Corporation"],"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation","institution_ids":["https://openalex.org/I105695857","https://openalex.org/I4210099704"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111972259","display_name":"Mohamed Dessouky","orcid":null},"institutions":[{"id":"https://openalex.org/I105695857","display_name":"Siemens (Hungary)","ror":"https://ror.org/01rk7mv85","country_code":"HU","type":"company","lineage":["https://openalex.org/I105695857","https://openalex.org/I1325886976"]},{"id":"https://openalex.org/I4210099704","display_name":"Mentor","ror":"https://ror.org/016grqh48","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210099704"]}],"countries":["GB","HU"],"is_corresponding":false,"raw_author_name":"Mohamed Dessouky","raw_affiliation_strings":["Mentor Graphics Corporation"],"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation","institution_ids":["https://openalex.org/I105695857","https://openalex.org/I4210099704"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5045586899"],"corresponding_institution_ids":["https://openalex.org/I105695857","https://openalex.org/I4210099704"],"apc_list":null,"apc_paid":null,"fwci":0.2002,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.61320214,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"474","last_page":"477"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.7822260856628418},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7205401659011841},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.6473160982131958},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.647254228591919},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.6292517185211182},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5383421182632446},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.5353881120681763},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5277890563011169},{"id":"https://openalex.org/keywords/foundry","display_name":"Foundry","score":0.4726414084434509},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.46180054545402527},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4518250823020935},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.4163247346878052},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3999269902706146},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3513973653316498},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2733081877231598},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2564449906349182},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21078869700431824},{"id":"https://openalex.org/keywords/mechanical-engineering","display_name":"Mechanical engineering","score":0.1075192391872406}],"concepts":[{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.7822260856628418},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7205401659011841},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.6473160982131958},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.647254228591919},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.6292517185211182},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5383421182632446},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.5353881120681763},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5277890563011169},{"id":"https://openalex.org/C2781087836","wikidata":"https://www.wikidata.org/wiki/Q13883136","display_name":"Foundry","level":2,"score":0.4726414084434509},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.46180054545402527},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4518250823020935},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.4163247346878052},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3999269902706146},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3513973653316498},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2733081877231598},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2564449906349182},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21078869700431824},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.1075192391872406},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2015.7440351","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2015.7440351","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1566916904","https://openalex.org/W2085399494","https://openalex.org/W2087962081","https://openalex.org/W2111666518","https://openalex.org/W2114062129","https://openalex.org/W2138451888","https://openalex.org/W2475898412","https://openalex.org/W2563688906","https://openalex.org/W4249641003","https://openalex.org/W6633800908"],"related_works":["https://openalex.org/W3011978806","https://openalex.org/W2743305891","https://openalex.org/W3205162826","https://openalex.org/W2059530328","https://openalex.org/W3207169898","https://openalex.org/W2951650892","https://openalex.org/W4318224788","https://openalex.org/W2331259470","https://openalex.org/W3198354237","https://openalex.org/W1596716095"],"abstract_inverted_index":{"This":[0,16],"paper":[1],"presents":[2],"a":[3,37,87],"new":[4],"environment":[5,17],"for":[6],"characterizing":[7],"foundry":[8,65],"CMOS":[9],"device":[10],"models":[11,66],"and":[12,67,97],"analog":[13,25,31],"basic":[14,26,40],"blocks.":[15,28],"can":[18,59],"also":[19],"be":[20],"used":[21],"to":[22],"design":[23],"some":[24],"building":[27,41],"It":[29,58],"designs":[30],"circuits":[32],"by":[33],"dividing":[34],"them":[35],"into":[36],"set":[38],"of":[39,79],"blocks":[42],"connected":[43],"together,":[44],"where":[45],"each":[46],"block":[47],"is":[48,83],"optimized":[49],"separately":[50],"considering":[51],"other":[52],"blocks'":[53],"loading":[54],"and/or":[55],"boundary":[56],"conditions.":[57],"run":[60],"over":[61,92],"different":[62],"technologies":[63],"using":[64],"simulation":[68],"measurements":[69],"without":[70],"approximations,":[71],"hand":[72],"calculations":[73],"or":[74],"simplified":[75],"equations.":[76],"The":[77],"efficiency":[78],"the":[80],"complete":[81],"flow":[82],"evaluated":[84],"through":[85],"designing":[86],"single-ended":[88],"two-stage":[89],"operational":[90],"amplifier":[91],"180nm,":[93],"130nm,":[94],"90nm,":[95],"65nm":[96],"40nm":[98],"technologies.":[99]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}