{"id":"https://openalex.org/W2080031036","doi":"https://doi.org/10.1109/icecs.2014.7050041","title":"Closed-loop simulation method for evaluation of static offset in discrete-time comparators","display_name":"Closed-loop simulation method for evaluation of static offset in discrete-time comparators","publication_year":2014,"publication_date":"2014-12-01","ids":{"openalex":"https://openalex.org/W2080031036","doi":"https://doi.org/10.1109/icecs.2014.7050041","mag":"2080031036"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2014.7050041","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2014.7050041","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://idus.us.es/handle//11441/74450","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072282417","display_name":"Antonio Gin\u00e9s","orcid":"https://orcid.org/0000-0001-5272-5802"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"A. J. Gines","raw_affiliation_strings":["Instituto de Microelectr6nica de Sevilla IMSE-CNM, CSIC and Universidad de Sevilla, Sevilla, Spain","Institute de Microelectr\u00f3nica de Sevilla IMSE-CNM, (CSIC and Universidad de Sevilla), Sevilla, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr6nica de Sevilla IMSE-CNM, CSIC and Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]},{"raw_affiliation_string":"Institute de Microelectr\u00f3nica de Sevilla IMSE-CNM, (CSIC and Universidad de Sevilla), Sevilla, Spain","institution_ids":["https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091600572","display_name":"E. Peral\u00edas","orcid":"https://orcid.org/0000-0003-0629-0785"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"E. Peralias","raw_affiliation_strings":["Instituto de Microelectr6nica de Sevilla IMSE-CNM, CSIC and Universidad de Sevilla, Sevilla, Spain","Institute de Microelectr\u00f3nica de Sevilla IMSE-CNM, (CSIC and Universidad de Sevilla), Sevilla, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr6nica de Sevilla IMSE-CNM, CSIC and Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]},{"raw_affiliation_string":"Institute de Microelectr\u00f3nica de Sevilla IMSE-CNM, (CSIC and Universidad de Sevilla), Sevilla, Spain","institution_ids":["https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006780064","display_name":"Gildas L\u00e9ger","orcid":"https://orcid.org/0000-0002-2310-7906"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"G. Leger","raw_affiliation_strings":["Instituto de Microelectr6nica de Sevilla IMSE-CNM, CSIC and Universidad de Sevilla, Sevilla, Spain","Institute de Microelectr\u00f3nica de Sevilla IMSE-CNM, (CSIC and Universidad de Sevilla), Sevilla, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr6nica de Sevilla IMSE-CNM, CSIC and Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]},{"raw_affiliation_string":"Institute de Microelectr\u00f3nica de Sevilla IMSE-CNM, (CSIC and Universidad de Sevilla), Sevilla, Spain","institution_ids":["https://openalex.org/I79238269"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066990447","display_name":"A. Rueda","orcid":"https://orcid.org/0000-0003-4564-9359"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"A. Rueda","raw_affiliation_strings":["Instituto de Microelectr6nica de Sevilla IMSE-CNM, CSIC and Universidad de Sevilla, Sevilla, Spain","Institute de Microelectr\u00f3nica de Sevilla IMSE-CNM, (CSIC and Universidad de Sevilla), Sevilla, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr6nica de Sevilla IMSE-CNM, CSIC and Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]},{"raw_affiliation_string":"Institute de Microelectr\u00f3nica de Sevilla IMSE-CNM, (CSIC and Universidad de Sevilla), Sevilla, Spain","institution_ids":["https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.19954963,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"56","issue":null,"first_page":"538","last_page":"541"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.8539397716522217},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8457388877868652},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6340864896774292},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5400233268737793},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.494295597076416},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4200735092163086},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.38969260454177856},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1767278015613556},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14613807201385498},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12187033891677856}],"concepts":[{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.8539397716522217},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8457388877868652},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6340864896774292},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5400233268737793},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.494295597076416},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4200735092163086},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.38969260454177856},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1767278015613556},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14613807201385498},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12187033891677856},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/icecs.2014.7050041","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2014.7050041","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.926.5575","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.926.5575","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://digital.csic.es/bitstream/10261/113339/1/ICECS_ID_2271_GINES.pdf","raw_type":"text"},{"id":"pmh:oai:digital.csic.es:10261/113339","is_oa":false,"landing_page_url":"http://hdl.handle.net/10261/113339","pdf_url":null,"source":{"id":"https://openalex.org/S4306400616","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"http://purl.org/coar/resource_type/c_6501"},{"id":"pmh:oai:dnet:idus________::c24e1e6e6ad1ff138bb76fb834265401","is_oa":true,"landing_page_url":"https://idus.us.es/handle//11441/74450","pdf_url":null,"source":{"id":"https://openalex.org/S4306402641","display_name":"LA Referencia (Red Federada de Repositorios Institucionales de Publicaciones Cient\u00edficas)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4383465926","host_organization_name":"LA Referencia","host_organization_lineage":["https://openalex.org/I4383465926"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:dnet:idus________::c24e1e6e6ad1ff138bb76fb834265401","is_oa":true,"landing_page_url":"https://idus.us.es/handle//11441/74450","pdf_url":null,"source":{"id":"https://openalex.org/S4306402641","display_name":"LA Referencia (Red Federada de Repositorios Institucionales de Publicaciones Cient\u00edficas)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4383465926","host_organization_name":"LA Referencia","host_organization_lineage":["https://openalex.org/I4383465926"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/8","score":0.6000000238418579,"display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1990311738","https://openalex.org/W2004874449","https://openalex.org/W2031429207","https://openalex.org/W2071049358","https://openalex.org/W2170009484","https://openalex.org/W2187548090","https://openalex.org/W2604162964","https://openalex.org/W6658323000","https://openalex.org/W6736131801"],"related_works":["https://openalex.org/W2044867305","https://openalex.org/W3161676474","https://openalex.org/W2049207285","https://openalex.org/W2136440001","https://openalex.org/W2135250276","https://openalex.org/W3093575925","https://openalex.org/W2122001378","https://openalex.org/W1951127657","https://openalex.org/W1901843583","https://openalex.org/W1965493748"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,20,63],"simulation-based":[4],"method":[5,71],"for":[6],"evaluating":[7],"the":[8,25,29,41,48,70,78,85],"static":[9],"offset":[10,43,86],"in":[11,62],"discrete-time":[12],"comparators.":[13],"The":[14,51,67],"proposed":[15],"procedure":[16],"is":[17,44],"based":[18],"on":[19],"closed-loop":[21],"algorithm":[22],"which":[23],"forces":[24],"input":[26],"signal":[27],"of":[28,69,76,80],"comparator":[30],"to":[31,34,83],"quickly":[32],"converge":[33],"its":[35],"effective":[36],"threshold.":[37],"From":[38],"this":[39],"value,":[40],"final":[42],"computed":[45],"by":[46,73],"subtracting":[47],"ideal":[49],"reference.":[50],"proposal":[52],"was":[53],"validated":[54],"using":[55],"realistic":[56],"behavioral":[57],"models":[58],"and":[59],"transistor-level":[60],"simulations":[61],"0.18\u03bcm":[64],"CMOS":[65],"technology.":[66],"application":[68],"reduces":[72],"several":[74],"orders":[75],"magnitude":[77],"number":[79],"cycles":[81],"needed":[82],"characterize":[84],"during":[87],"design,":[88],"drastically":[89],"improving":[90],"productivity.":[91]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
