{"id":"https://openalex.org/W2050887715","doi":"https://doi.org/10.1109/icecs.2011.6122383","title":"Design and experimentation with low-power morphable multipliers","display_name":"Design and experimentation with low-power morphable multipliers","publication_year":2011,"publication_date":"2011-12-01","ids":{"openalex":"https://openalex.org/W2050887715","doi":"https://doi.org/10.1109/icecs.2011.6122383","mag":"2050887715"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2011.6122383","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2011.6122383","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://doi.org/10.1109/ICECS.2011.6122383","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049984593","display_name":"Efstathios Sotiriou-Xanthopoulos","orcid":"https://orcid.org/0000-0001-8323-3747"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Efstathios Sotiriou-Xanthopoulos","raw_affiliation_strings":["School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National Technical University of Athens, Athens, Greece","National Technical University of Athens, School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, Heroon Polytechniou 9, GR-15780 Zografou, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"National Technical University of Athens, School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, Heroon Polytechniou 9, GR-15780 Zografou, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055307805","display_name":"Dionysios Diamantopoulos","orcid":"https://orcid.org/0000-0003-2979-5946"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dionysios Diamantopoulos","raw_affiliation_strings":["School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National Technical University of Athens, Athens, Greece","National Technical University of Athens, School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, Heroon Polytechniou 9, GR-15780 Zografou, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"National Technical University of Athens, School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, Heroon Polytechniou 9, GR-15780 Zografou, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089110665","display_name":"George Economakos","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George Economakos","raw_affiliation_strings":["School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National Technical University of Athens, Athens, Greece","National Technical University of Athens, School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, Heroon Polytechniou 9, GR-15780 Zografou, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"National Technical University of Athens, School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, Heroon Polytechniou 9, GR-15780 Zografou, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043131021","display_name":"Dimitrios Soudris","orcid":"https://orcid.org/0000-0002-6930-6847"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitrios Soudris","raw_affiliation_strings":["School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National Technical University of Athens, Athens, Greece","National Technical University of Athens, School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, Heroon Polytechniou 9, GR-15780 Zografou, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"National Technical University of Athens, School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, Heroon Polytechniou 9, GR-15780 Zografou, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5049984593"],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":null,"apc_paid":null,"fwci":0.3696,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.64205475,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"752","last_page":"755"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.7999236583709717},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7447645664215088},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.6765691637992859},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6758253574371338},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6445841193199158},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.49913597106933594},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.48239433765411377},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4110249876976013},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3753005862236023},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3512934446334839},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3486427664756775},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.23540174961090088},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.16844046115875244},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14006337523460388},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12296167016029358},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.100995272397995},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0945340096950531}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.7999236583709717},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7447645664215088},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.6765691637992859},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6758253574371338},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6445841193199158},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.49913597106933594},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.48239433765411377},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4110249876976013},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3753005862236023},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3512934446334839},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3486427664756775},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.23540174961090088},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.16844046115875244},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14006337523460388},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12296167016029358},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.100995272397995},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0945340096950531},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs.2011.6122383","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2011.6122383","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/36175","is_oa":true,"landing_page_url":"http://doi.org/10.1109/ICECS.2011.6122383","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2011","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/36175","is_oa":true,"landing_page_url":"http://doi.org/10.1109/ICECS.2011.6122383","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2011","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1559404176","https://openalex.org/W1986507733","https://openalex.org/W2111730936","https://openalex.org/W2130173288","https://openalex.org/W2130396671","https://openalex.org/W2134196168","https://openalex.org/W2163916557","https://openalex.org/W2913800469","https://openalex.org/W3141208835","https://openalex.org/W3148561798","https://openalex.org/W6676767754","https://openalex.org/W6758940942"],"related_works":["https://openalex.org/W2109699519","https://openalex.org/W2006568360","https://openalex.org/W102726818","https://openalex.org/W4233616027","https://openalex.org/W1603782859","https://openalex.org/W2170506987","https://openalex.org/W2105974726","https://openalex.org/W2544361057","https://openalex.org/W1824649256","https://openalex.org/W1570136540"],"abstract_inverted_index":{"Reconfigurable":[0],"computing":[1],"is":[2,86],"a":[3],"cost-effective":[4],"alternative":[5,142],"to":[6,11,39,57,140],"technology":[7],"shrinking":[8],"in":[9,15,24],"order":[10],"achieve":[12],"higher":[13],"performance":[14,91],"digital":[16],"design,":[17],"especially":[18],"considering":[19],"run":[20],"time":[21],"reconfiguration.":[22],"Research":[23],"the":[25,67,83,94,119],"field":[26],"consists":[27],"of":[28,47,69,96,121],"new":[29,37],"reconfig-urable":[30],"architectures,":[31,143],"either":[32],"coarse-grain":[33,48],"or":[34],"fine-grain,":[35],"and":[36,61,111,136],"methodologies":[38],"map":[40],"applications":[41],"onto":[42],"them.":[43],"A":[44],"special":[45],"case":[46],"reconfigurable":[49],"components":[50,77,89],"are":[51],"morphable":[52,123],"multipliers,":[53],"which":[54],"use":[55,95],"multiplexers":[56,98],"feed":[58],"different":[59,63,76],"inputs":[60],"form":[62,75],"connection":[64,73],"schemes":[65,74],"within":[66],"datapath":[68],"conventional":[70],"multipliers.":[71,124],"These":[72],"that":[78,130],"can":[79,132],"be":[80],"utilized":[81],"when":[82],"initial":[84],"multiplier":[85],"idle.":[87],"Morphable":[88],"offer":[90,133],"improvements":[92,138],"but":[93],"extra":[97],"impose":[99],"power":[100,109,137],"overheads.":[101],"This":[102],"paper":[103],"applies":[104],"two":[105],"low-power":[106,122],"design":[107,120],"techniques,":[108],"gating":[110],"multi":[112],"V":[113],"<sub":[114],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[115],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">th</sub>":[116],"components,":[117],"for":[118,149],"Experimentation":[125],"with":[126],"these":[127],"multipliers":[128],"show":[129],"they":[131],"performance,":[134],"area":[135],"compared":[139],"other":[141],"making":[144],"them":[145],"valuable":[146],"building":[147],"blocks":[148],"hardware":[150],"synthesis.":[151]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}