{"id":"https://openalex.org/W2010689663","doi":"https://doi.org/10.1109/icecs.2011.6122367","title":"A small footprint interleaved multithreaded processor for embedded systems","display_name":"A small footprint interleaved multithreaded processor for embedded systems","publication_year":2011,"publication_date":"2011-12-01","ids":{"openalex":"https://openalex.org/W2010689663","doi":"https://doi.org/10.1109/icecs.2011.6122367","mag":"2010689663"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2011.6122367","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2011.6122367","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049484550","display_name":"Charly Bechara","orcid":null},"institutions":[{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Charly Bechara","raw_affiliation_strings":["LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France"],"affiliations":[{"raw_affiliation_string":"LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057468452","display_name":"Aurelien Berhault","orcid":null},"institutions":[{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Aurelien Berhault","raw_affiliation_strings":["LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France"],"affiliations":[{"raw_affiliation_string":"LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002951583","display_name":"Nicolas Ventroux","orcid":null},"institutions":[{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Nicolas Ventroux","raw_affiliation_strings":["LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France"],"affiliations":[{"raw_affiliation_string":"LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088873156","display_name":"St\u00e9phane Chevobbe","orcid":"https://orcid.org/0000-0001-6907-097X"},"institutions":[{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Stephane Chevobbe","raw_affiliation_strings":["LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France"],"affiliations":[{"raw_affiliation_string":"LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057529378","display_name":"Yves Lhuillier","orcid":null},"institutions":[{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Yves Lhuillier","raw_affiliation_strings":["LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France"],"affiliations":[{"raw_affiliation_string":"LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110306356","display_name":"Rapha\u00ebl David","orcid":null},"institutions":[{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Raphael David","raw_affiliation_strings":["LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France"],"affiliations":[{"raw_affiliation_string":"LIST, Embedded Computing Laboratory, CEA, Gif-sur-Yvette, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette, F-91191, France","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108138317","display_name":"Daniel Etiemble","orcid":null},"institutions":[{"id":"https://openalex.org/I4210144804","display_name":"Laboratoire de Recherche en Informatique","ror":"https://ror.org/04e3ktk27","country_code":"FR","type":"facility","lineage":["https://openalex.org/I102197404","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I4210144804","https://openalex.org/I4210159245"]},{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Daniel Etiemble","raw_affiliation_strings":["Laboratoire de Recherche en Informatique, Universit\u00e9 Paris Sud, Orsay, France","Universit\u00e9 Paris Sud, Laboratoire de Recherche en Informatique, Orsay, F-91405, FRANCE"],"affiliations":[{"raw_affiliation_string":"Laboratoire de Recherche en Informatique, Universit\u00e9 Paris Sud, Orsay, France","institution_ids":["https://openalex.org/I4210144804","https://openalex.org/I102197404"]},{"raw_affiliation_string":"Universit\u00e9 Paris Sud, Laboratoire de Recherche en Informatique, Orsay, F-91405, FRANCE","institution_ids":["https://openalex.org/I102197404"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5049484550"],"corresponding_institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"],"apc_list":null,"apc_paid":null,"fwci":2.7705,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.90903885,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"1","issue":null,"first_page":"685","last_page":"690"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8067218065261841},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6577889919281006},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.5960621237754822},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.577703595161438},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.5103587508201599},{"id":"https://openalex.org/keywords/instructions-per-cycle","display_name":"Instructions per cycle","score":0.5081684589385986},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49112817645072937},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.48924803733825684},{"id":"https://openalex.org/keywords/memory-footprint","display_name":"Memory footprint","score":0.4812752604484558},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.4801177978515625},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.4519325792789459},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44542163610458374},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.41339111328125},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2640213370323181},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.2213786244392395},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18757027387619019},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.17733147740364075}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8067218065261841},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6577889919281006},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.5960621237754822},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.577703595161438},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.5103587508201599},{"id":"https://openalex.org/C156972235","wikidata":"https://www.wikidata.org/wiki/Q1443434","display_name":"Instructions per cycle","level":3,"score":0.5081684589385986},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49112817645072937},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.48924803733825684},{"id":"https://openalex.org/C74912251","wikidata":"https://www.wikidata.org/wiki/Q6815727","display_name":"Memory footprint","level":2,"score":0.4812752604484558},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4801177978515625},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.4519325792789459},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44542163610458374},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.41339111328125},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2640213370323181},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.2213786244392395},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18757027387619019},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.17733147740364075}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2011.6122367","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2011.6122367","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W40718637","https://openalex.org/W1492601037","https://openalex.org/W1784630755","https://openalex.org/W2022740893","https://openalex.org/W2112371246","https://openalex.org/W2114712425","https://openalex.org/W2116020886","https://openalex.org/W2117041600","https://openalex.org/W2121082877","https://openalex.org/W2129192659","https://openalex.org/W2136360762","https://openalex.org/W2138610892","https://openalex.org/W2161001380","https://openalex.org/W2464177207","https://openalex.org/W2545500460","https://openalex.org/W4236271564","https://openalex.org/W4252934402","https://openalex.org/W6680738721"],"related_works":["https://openalex.org/W2164026451","https://openalex.org/W2806352516","https://openalex.org/W2148099609","https://openalex.org/W2062172248","https://openalex.org/W182515070","https://openalex.org/W4310584696","https://openalex.org/W2538644970","https://openalex.org/W2547383257","https://openalex.org/W4236915705","https://openalex.org/W4367172762"],"abstract_inverted_index":{"With":[0],"the":[1,4,11,22,25,30,81,125,141,153],"increase":[2],"in":[3,75,120],"design":[5],"complexity":[6],"of":[7,32,118],"MPSoC":[8],"architectures":[9,39],"and":[10,70,92,139],"need":[12],"for":[13,67],"more":[14],"transistor/energy":[15],"efficient":[16],"processor":[17,61],"architectures,":[18],"designers":[19],"are":[20],"exploiting":[21],"parallelism":[23],"at":[24],"thread":[26,65],"level":[27],"(TLP)":[28],"through":[29],"implementation":[31],"embedded":[33,68],"multithreaded":[34,60,82,129],"processors.":[35],"Moreover,":[36],"future":[37],"manycore":[38],"tend":[40],"to":[41,99,107,124,152],"use":[42],"small":[43,53],"footprint":[44],"RISC":[45],"cores.":[46],"In":[47],"this":[48],"paper,":[49],"we":[50],"present":[51],"a":[52,100,135],"footprint,":[54],"scalar,":[55],"in-order,":[56],"5-stage":[57],"pipeline,":[58],"interleaved":[59],"with":[62],"2":[63],"hardware":[64],"contexts":[66],"systems":[69],"SoC":[71],"integration.":[72],"Synthesis":[73],"results":[74],"40":[76],"nm":[77],"TSMC":[78],"shows":[79],"that":[80],"core":[83,114,121,130],"area":[84,122],"is":[85,96,131,149],"only":[86],"19800":[87],"\u03bcm":[88],"<sup":[89],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[90],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[91],"13.97":[93],"kilogates,":[94],"which":[95],"almost":[97],"equal":[98],"4KB":[101],"direct":[102],"mapped":[103],"cache":[104],"memory":[105],"according":[106],"CACTI":[108],"6.5":[109],"tool":[110],"[1].":[111],"The":[112,128,145],"IMT":[113],"has":[115],"an":[116],"augmentation":[117],"73.2%":[119],"compared":[123,151],"monothreaded":[126,154],"core.":[127,155],"validated":[132],"by":[133],"running":[134],"simple":[136],"bubble-sort":[137],"application":[138],"varying":[140],"L1":[142],"D$":[143],"memory.":[144],"average":[146],"performance":[147],"gain":[148],"17%":[150]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":6},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}