{"id":"https://openalex.org/W2108803574","doi":"https://doi.org/10.1109/icecs.2008.4674870","title":"The AES in a systolic fashion: Implementation and results of Celator processor","display_name":"The AES in a systolic fashion: Implementation and results of Celator processor","publication_year":2008,"publication_date":"2008-08-01","ids":{"openalex":"https://openalex.org/W2108803574","doi":"https://doi.org/10.1109/icecs.2008.4674870","mag":"2108803574"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2008.4674870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4674870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050098241","display_name":"Daniele Fronte","orcid":null},"institutions":[{"id":"https://openalex.org/I21491767","display_name":"Aix-Marseille Universit\u00e9","ror":"https://ror.org/035xkbk20","country_code":"FR","type":"education","lineage":["https://openalex.org/I21491767"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Daniele Fronte","raw_affiliation_strings":["Aix Marseille Universit\u00e9, France","IM2NP, Aix-Marseille Univ., Marseille"],"affiliations":[{"raw_affiliation_string":"Aix Marseille Universit\u00e9, France","institution_ids":["https://openalex.org/I21491767"]},{"raw_affiliation_string":"IM2NP, Aix-Marseille Univ., Marseille","institution_ids":["https://openalex.org/I21491767"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110114702","display_name":"A. Perez","orcid":null},"institutions":[{"id":"https://openalex.org/I21491767","display_name":"Aix-Marseille Universit\u00e9","ror":"https://ror.org/035xkbk20","country_code":"FR","type":"education","lineage":["https://openalex.org/I21491767"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Annie Perez","raw_affiliation_strings":["Aix Marseille Universit\u00e9, Marseilles, France","IM2NP, Aix-Marseille Univ., Marseille"],"affiliations":[{"raw_affiliation_string":"Aix Marseille Universit\u00e9, Marseilles, France","institution_ids":["https://openalex.org/I21491767"]},{"raw_affiliation_string":"IM2NP, Aix-Marseille Univ., Marseille","institution_ids":["https://openalex.org/I21491767"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080823566","display_name":"Eric Payrat","orcid":null},"institutions":[{"id":"https://openalex.org/I4210150879","display_name":"Atmel (France)","ror":"https://ror.org/04q92cj22","country_code":"FR","type":"company","lineage":["https://openalex.org/I4210150581","https://openalex.org/I4210150879"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Eric Payrat","raw_affiliation_strings":["Atmel Marseille, France","Atmel, Marseille"],"affiliations":[{"raw_affiliation_string":"Atmel Marseille, France","institution_ids":["https://openalex.org/I4210150879"]},{"raw_affiliation_string":"Atmel, Marseille","institution_ids":["https://openalex.org/I4210150879"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5050098241"],"corresponding_institution_ids":["https://openalex.org/I21491767"],"apc_list":null,"apc_paid":null,"fwci":1.1441,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.84367585,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"380","last_page":"383"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9933000206947327,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5240167379379272},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.4324619770050049},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.415763795375824},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3995112180709839},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.315510630607605}],"concepts":[{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5240167379379272},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.4324619770050049},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.415763795375824},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3995112180709839},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.315510630607605},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2008.4674870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4674870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.5600000023841858}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1890449996","https://openalex.org/W2011177581","https://openalex.org/W2101778660","https://openalex.org/W2103807043","https://openalex.org/W2112244944","https://openalex.org/W2114044800","https://openalex.org/W2136501680","https://openalex.org/W2153458792","https://openalex.org/W2911857293","https://openalex.org/W6633961309","https://openalex.org/W6676758390","https://openalex.org/W6677036316"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W1979131826","https://openalex.org/W2370066713","https://openalex.org/W1984979050","https://openalex.org/W2978161533","https://openalex.org/W2379338802"],"abstract_inverted_index":{"A":[0],"multi-algorithm":[1],"Crypto-Co-Processor":[2],"called":[3],"Celator":[4,7,31,48,130],"is":[5,9,112,145],"presented.":[6],"architecture":[8,46],"based":[10],"on":[11,118,128],"a":[12,18,21,27,50,149],"4x4":[13],"Processing":[14,52],"Elements":[15],"systolic":[16],"array,":[17],"Sequencer":[19,65],"with":[20,148,171],"Finite":[22],"State":[23],"Machine":[24],"(FSM)":[25],"and":[26,55,62,70,80,102,165,175],"local":[28],"memory,":[29],"the":[30,40,60,67,73,77,81,88,91,100,107,110,119,122],"RAM":[32],"(CRAM).":[33],"Data":[34],"are":[35,97],"encrypted":[36],"or":[37],"decrypted":[38],"by":[39,106],"PE":[41,68,78,86],"array.":[42],"The":[43,64,94],"whole":[44],"system":[45],"around":[47],"includes":[49],"Central":[51],"Unit":[53],"(CPU)":[54],"an":[56,133],"Interface":[57],"unit":[58],"between":[59,76],"CPU":[61],"Celator.":[63,129],"controls":[66],"array":[69,79],"manages":[71],"all":[72],"data":[74,92],"transfers":[75],"CPU.":[82],"Three":[83],"multiplexers":[84],"per":[85],"allow":[87],"reconfigurability":[89],"of":[90,121],"path.":[93],"FSM":[95,111],"instructions":[96],"stored":[98],"in":[99,136,140],"CRAM":[101],"can":[103,131],"be":[104],"changed":[105],"CPU:":[108],"therefore":[109],"also":[113],"reconfigurable.":[114],"This":[115],"paper":[116],"focuses":[117],"implementation":[120],"Advanced":[123],"Encryption":[124],"Standard":[125],"(AES)":[126],"transformations":[127],"perform":[132],"AES":[134,173],"encryption":[135],"580":[137],"clock":[138],"cycles":[139],"Electronic":[141],"Codebook":[142],"mode,":[143],"which":[144],"less":[146],"than":[147],"general":[150],"purpose":[151],"processor.":[152],"Finally":[153],"we":[154],"report":[155],"performance":[156],"comparisons":[157],"among":[158],"Celator,":[159],"ARM":[160,163],"7":[161],"TDMI,":[162],"9":[164],"AVR":[166],"microprocessors,":[167],"as":[168,170],"well":[169],"some":[172],"dedicated":[174],"dynamically":[176],"reconfigurable":[177],"circuits.":[178]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
