{"id":"https://openalex.org/W2029049697","doi":"https://doi.org/10.1109/icecs.2007.4511132","title":"CAD methodology for Analog Static CMOS Design Automation","display_name":"CAD methodology for Analog Static CMOS Design Automation","publication_year":2007,"publication_date":"2007-12-01","ids":{"openalex":"https://openalex.org/W2029049697","doi":"https://doi.org/10.1109/icecs.2007.4511132","mag":"2029049697"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2007.4511132","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2007.4511132","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 14th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085212579","display_name":"Fran\u00e7ois Rudolff","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210088137","display_name":"Toulon Var Technologies (France)","ror":"https://ror.org/009n2kd47","country_code":"FR","type":"company","lineage":["https://openalex.org/I4210088137"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Francois Rudolff","raw_affiliation_strings":["L2MP UMR 6137 CNRS - ISEN-Toulon, Maison des technologies Place G. Pompidou, 83000 Toulon, France. Email: francois.rudolff@isen.fr","L2MP UMR 6137, Maison des technologies Place G. Pompidou, Toulon, France"],"affiliations":[{"raw_affiliation_string":"L2MP UMR 6137 CNRS - ISEN-Toulon, Maison des technologies Place G. Pompidou, 83000 Toulon, France. Email: francois.rudolff@isen.fr","institution_ids":["https://openalex.org/I4210088137","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"L2MP UMR 6137, Maison des technologies Place G. Pompidou, Toulon, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008813980","display_name":"Edith Kussener","orcid":"https://orcid.org/0000-0002-1670-9327"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I143002897","display_name":"Universit\u00e9 de Toulon","ror":"https://ror.org/02m9kbe37","country_code":"FR","type":"education","lineage":["https://openalex.org/I143002897"]},{"id":"https://openalex.org/I4210088137","display_name":"Toulon Var Technologies (France)","ror":"https://ror.org/009n2kd47","country_code":"FR","type":"company","lineage":["https://openalex.org/I4210088137"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Edith Kussener","raw_affiliation_strings":["L2MP UMR 6137 CNRS - ISEN-Toulon, Maison des technologies Place G. Pompidou, 83000 Toulon, France. Email: edith.kussener@isen.fr","L2MP UMR 6137 CNRS - ISEN-Toulon, Toulon"],"affiliations":[{"raw_affiliation_string":"L2MP UMR 6137 CNRS - ISEN-Toulon, Maison des technologies Place G. Pompidou, 83000 Toulon, France. Email: edith.kussener@isen.fr","institution_ids":["https://openalex.org/I4210088137","https://openalex.org/I143002897","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"L2MP UMR 6137 CNRS - ISEN-Toulon, Toulon","institution_ids":["https://openalex.org/I1294671590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024621833","display_name":"Gaetan Bracmard","orcid":null},"institutions":[{"id":"https://openalex.org/I4210150879","display_name":"Atmel (France)","ror":"https://ror.org/04q92cj22","country_code":"FR","type":"company","lineage":["https://openalex.org/I4210150581","https://openalex.org/I4210150879"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Gaetan Bracmard","raw_affiliation_strings":["ATMEL Rousset, Zone Industrielle, 13106 Rousset, France. Email: gaetan.bracmard@rfo.atmel.com"],"affiliations":[{"raw_affiliation_string":"ATMEL Rousset, Zone Industrielle, 13106 Rousset, France. Email: gaetan.bracmard@rfo.atmel.com","institution_ids":["https://openalex.org/I4210150879"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5085212579"],"corresponding_institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I4210088137"],"apc_list":null,"apc_paid":null,"fwci":0.2679,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.6159986,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"882","last_page":"885"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7688143253326416},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6256132125854492},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6123757362365723},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.6104026436805725},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.54240483045578},{"id":"https://openalex.org/keywords/cad","display_name":"CAD","score":0.5281664729118347},{"id":"https://openalex.org/keywords/inversion","display_name":"Inversion (geology)","score":0.5019910335540771},{"id":"https://openalex.org/keywords/computer-aided-design","display_name":"Computer Aided Design","score":0.49959421157836914},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4975025951862335},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.47899481654167175},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4677576720714569},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4474155008792877},{"id":"https://openalex.org/keywords/design-methods","display_name":"Design methods","score":0.4438796043395996},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4339786767959595},{"id":"https://openalex.org/keywords/current-mirror","display_name":"Current mirror","score":0.4174976050853729},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3826885521411896},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26814883947372437},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2632173001766205},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.12074625492095947},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.09680777788162231}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7688143253326416},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6256132125854492},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6123757362365723},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.6104026436805725},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.54240483045578},{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.5281664729118347},{"id":"https://openalex.org/C1893757","wikidata":"https://www.wikidata.org/wiki/Q3653001","display_name":"Inversion (geology)","level":3,"score":0.5019910335540771},{"id":"https://openalex.org/C119823426","wikidata":"https://www.wikidata.org/wiki/Q184793","display_name":"Computer Aided Design","level":2,"score":0.49959421157836914},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4975025951862335},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.47899481654167175},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4677576720714569},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4474155008792877},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.4438796043395996},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4339786767959595},{"id":"https://openalex.org/C173966970","wikidata":"https://www.wikidata.org/wiki/Q786012","display_name":"Current mirror","level":4,"score":0.4174976050853729},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3826885521411896},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26814883947372437},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2632173001766205},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.12074625492095947},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.09680777788162231},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C109007969","wikidata":"https://www.wikidata.org/wiki/Q749565","display_name":"Structural basin","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2007.4511132","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2007.4511132","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 14th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1980318541","https://openalex.org/W2026803795","https://openalex.org/W2079826846","https://openalex.org/W2114490265","https://openalex.org/W2151940289","https://openalex.org/W2405592143","https://openalex.org/W2419541954"],"related_works":["https://openalex.org/W3205162826","https://openalex.org/W4327500672","https://openalex.org/W2059530328","https://openalex.org/W2045647383","https://openalex.org/W2080428035","https://openalex.org/W2743305891","https://openalex.org/W3198354237","https://openalex.org/W3011978806","https://openalex.org/W2951650892","https://openalex.org/W2154454108"],"abstract_inverted_index":{"The":[0,76,87,94],"computer-aided":[1],"design":[2,71],"(CAD)":[3],"methodology":[4,15,30,77],"proposed":[5],"in":[6,46,91,96],"this":[7],"paper,":[8],"automates":[9],"analog":[10],"static":[11],"CMOS":[12],"design.":[13],"This":[14,29],"is":[16,23,78,89],"based":[17],"on":[18,80],"the":[19,26,52],"EKV":[20],"model":[21],"which":[22],"continuous":[24],"over":[25],"inversion":[27,61],"range.":[28],"provides":[31],"accurate":[32],"description":[33],"of":[34,42,105,111],"current":[35,85,109],"drain":[36],"(error":[37],"<":[38],"10%)":[39],"with":[40,113],"integration":[41],"second":[43],"order":[44],"effects":[45],"charts":[47],"for":[48,69,107],"simplicity.":[49],"It":[50],"explores":[51],"whole":[53],"solution":[54],"space.":[55],"Thus,":[56],"circuits":[57],"are":[58],"sized":[59],"without":[60],"level":[62],"constraint":[63],"and":[64,73],"can":[65],"be":[66],"optimized":[67,90],"unambiguously":[68],"given":[70,74],"requirements":[72],"technology.":[75],"illustrated":[79],"a":[81,101,108],"classic":[82],"self-biased":[83],"compact":[84],"reference.":[86],"circuit":[88],"supply":[92,103],"voltage.":[93],"simulation":[95],"0.15":[97],"\u03bcm":[98],"technology":[99],"gives":[100],"minimum":[102],"voltage":[104],"800mV":[106],"target":[110],"50nA":[112],"10%":[114],"accuracy.":[115]},"counts_by_year":[],"updated_date":"2026-03-25T13:04:00.132906","created_date":"2025-10-10T00:00:00"}