{"id":"https://openalex.org/W2169096324","doi":"https://doi.org/10.1109/iccd.1995.528789","title":"A high-performance asynchronous SCSI controller","display_name":"A high-performance asynchronous SCSI controller","publication_year":2002,"publication_date":"2002-11-19","ids":{"openalex":"https://openalex.org/W2169096324","doi":"https://doi.org/10.1109/iccd.1995.528789","mag":"2169096324"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.1995.528789","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.1995.528789","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003912143","display_name":"K.Y. Yun","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K.Y. Yun","raw_affiliation_strings":["Department of ECE, University of California, San Diego, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, University of California, San Diego, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009458897","display_name":"David L. Dill","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.L. Dill","raw_affiliation_strings":["Computer Systems Laboratory, University of Stanford, Stanford, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Laboratory, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.3103,"has_fulltext":false,"cited_by_count":31,"citation_normalized_percentile":{"value":0.91236734,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"v","issue":null,"first_page":"44","last_page":"49"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scsi","display_name":"SCSI","score":0.8800703287124634},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7305417060852051},{"id":"https://openalex.org/keywords/fifo","display_name":"FIFO (computing and electronics)","score":0.5864872336387634},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5713368654251099},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.48480406403541565},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47491252422332764},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.44604623317718506},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4030149281024933},{"id":"https://openalex.org/keywords/computer-data-storage","display_name":"Computer data storage","score":0.1363457441329956},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.13488692045211792},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1325017511844635}],"concepts":[{"id":"https://openalex.org/C2781430025","wikidata":"https://www.wikidata.org/wiki/Q220868","display_name":"SCSI","level":3,"score":0.8800703287124634},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7305417060852051},{"id":"https://openalex.org/C2777145635","wikidata":"https://www.wikidata.org/wiki/Q515636","display_name":"FIFO (computing and electronics)","level":2,"score":0.5864872336387634},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5713368654251099},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.48480406403541565},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47491252422332764},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.44604623317718506},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4030149281024933},{"id":"https://openalex.org/C194739806","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Computer data storage","level":2,"score":0.1363457441329956},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.13488692045211792},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1325017511844635},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iccd.1995.528789","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.1995.528789","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.53.1847","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.53.1847","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://paradise.ucsd.edu/PAPERS/ICCD-95.ps","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4000000059604645,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W169353854","https://openalex.org/W1498870363","https://openalex.org/W1537297184","https://openalex.org/W2052006175","https://openalex.org/W2104105510","https://openalex.org/W2107899912","https://openalex.org/W2126590585","https://openalex.org/W2142896144","https://openalex.org/W2166853570","https://openalex.org/W4231905827","https://openalex.org/W4241900767"],"related_works":["https://openalex.org/W4363649224","https://openalex.org/W913418521","https://openalex.org/W2349510975","https://openalex.org/W2985738161","https://openalex.org/W2393726430","https://openalex.org/W2351416717","https://openalex.org/W2091775102","https://openalex.org/W2348222203","https://openalex.org/W2388710223","https://openalex.org/W2379740927"],"abstract_inverted_index":{"We":[0],"describe":[1],"the":[2,18,30,34,65,71,93,97,101,106,112],"design":[3,45,79,98,110],"of":[4,40,64],"a":[5,50,81,126,129],"high":[6],"performance":[7,89],"asynchronous":[8,27],"SCSI":[9,54,94],"(small":[10],"computer":[11],"systems":[12],"interface)":[13],"controller":[14,55],"data":[15,23,35,113],"path":[16,24,36],"and":[17,29,56,100,128],"associated":[19],"control":[20,31,131],"circuits.":[21],"The":[22,74,88],"is":[25,46,80,90,103],"an":[26],"pipeline":[28],"circuits":[32],"for":[33,70,77],"are":[37],"built":[38],"out":[39],"extended":[41,135],"burst-mode":[42,136],"machines.":[43,138],"This":[44,109],"functionally":[47],"compatible":[48],"with":[49,60,105],"widely":[51],"used":[52,69,76],"commercial":[53,72,107],"was":[57],"simulated":[58],"correctly":[59],"respect":[61],"to":[62,118],"all":[63],"applicable":[66],"test":[67],"vectors":[68],"design.":[73,108],"technology":[75],"this":[78],"0.8":[82],"/spl":[83],"mu/m":[84],"CMOS":[85],"standard":[86],"cell.":[87],"limited":[91],"by":[92,116,124],"specification,":[95],"not":[96],"itself,":[99],"area":[102],"competitive":[104],"improves":[111],"transfer":[114],"throughput":[115],"up":[117],"2.5":[119],"times":[120],"from":[121],"previous":[122],"work":[123],"incorporating":[125],"FIFO":[127],"distributed":[130],"scheme":[132],"based":[133],"on":[134],"state":[137]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
