{"id":"https://openalex.org/W2103351250","doi":"https://doi.org/10.1109/iccd.1994.331908","title":"A class of good characteristic polynomials for LFSR test pattern generators","display_name":"A class of good characteristic polynomials for LFSR test pattern generators","publication_year":2002,"publication_date":"2002-12-17","ids":{"openalex":"https://openalex.org/W2103351250","doi":"https://doi.org/10.1109/iccd.1994.331908","mag":"2103351250"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.1994.331908","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.1994.331908","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009349080","display_name":"Dimitri Kagaris","orcid":"https://orcid.org/0000-0003-2061-5080"},"institutions":[{"id":"https://openalex.org/I107672454","display_name":"Dartmouth College","ror":"https://ror.org/049s0rh22","country_code":"US","type":"education","lineage":["https://openalex.org/I107672454"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"D. Kagaris","raw_affiliation_strings":["Dartmouth College, Hanover, NH, USA"],"affiliations":[{"raw_affiliation_string":"Dartmouth College, Hanover, NH, USA","institution_ids":["https://openalex.org/I107672454"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083284025","display_name":"Spyros Tragoudas","orcid":"https://orcid.org/0009-0006-2575-3588"},"institutions":[{"id":"https://openalex.org/I110378019","display_name":"Southern Illinois University Carbondale","ror":"https://ror.org/049kefs16","country_code":"US","type":"education","lineage":["https://openalex.org/I110378019","https://openalex.org/I2801502357"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Tragoudas","raw_affiliation_strings":["Computer Science Department, Southem Illinois University, Carbondale, IL, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science Department, Southem Illinois University, Carbondale, IL, USA","institution_ids":["https://openalex.org/I110378019"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5009349080"],"corresponding_institution_ids":["https://openalex.org/I107672454"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.12201026,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"292","last_page":"295"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/linear-feedback-shift-register","display_name":"Linear feedback shift register","score":0.7813208103179932},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.6635079979896545},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5223575830459595},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5201154947280884},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.5155072212219238},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.48361411690711975},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.47670310735702515},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.4766151010990143},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.45608729124069214},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4553348422050476},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.41683465242385864},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.39163246750831604},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.3295973539352417},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.2644466757774353},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17163273692131042},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.13973206281661987},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10046771168708801}],"concepts":[{"id":"https://openalex.org/C159862308","wikidata":"https://www.wikidata.org/wiki/Q681101","display_name":"Linear feedback shift register","level":4,"score":0.7813208103179932},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.6635079979896545},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5223575830459595},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5201154947280884},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.5155072212219238},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.48361411690711975},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.47670310735702515},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.4766151010990143},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.45608729124069214},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4553348422050476},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.41683465242385864},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.39163246750831604},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.3295973539352417},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2644466757774353},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17163273692131042},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.13973206281661987},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10046771168708801},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.1994.331908","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.1994.331908","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1537824340","https://openalex.org/W1554885925","https://openalex.org/W1594652978","https://openalex.org/W1720470363","https://openalex.org/W1977656540","https://openalex.org/W2023158154","https://openalex.org/W2049664543","https://openalex.org/W2081035247","https://openalex.org/W2099644337","https://openalex.org/W2106126964","https://openalex.org/W2142070135","https://openalex.org/W2144792149","https://openalex.org/W4247089793","https://openalex.org/W4302458519","https://openalex.org/W6676060846"],"related_works":["https://openalex.org/W2152745368","https://openalex.org/W2184933991","https://openalex.org/W4252072603","https://openalex.org/W4288754393","https://openalex.org/W2154529098","https://openalex.org/W2188176208","https://openalex.org/W2761883387","https://openalex.org/W2133482355","https://openalex.org/W2080947141","https://openalex.org/W2119351822"],"abstract_inverted_index":{"Linear":[0],"Feedback":[1],"Shift":[2],"Registers":[3],"(LFSRs)":[4],"constitute":[5],"a":[6,25,73,86],"very":[7],"efficient":[8],"mechanism":[9],"for":[10,17,48,103],"generating":[11],"pseudo-exhaustive":[12],"or":[13],"pseudo-random":[14,104],"test":[15],"sets":[16],"the":[18,29,34,40,49,53,68,100,108],"built-in":[19],"self-testing":[20],"of":[21,31,36,55,75,89,113],"digital":[22],"circuits.":[23],"However,":[24],"well-known":[26],"problem":[27],"with":[28],"use":[30],"LFSRs":[32],"is":[33],"occurrence":[35],"linear":[37,56,90,114],"dependencies":[38,57,91,115],"in":[39],"generated":[41],"patterns.":[42],"In":[43],"this":[44],"paper,":[45],"we":[46],"show":[47,96],"first":[50],"time":[51],"that":[52,85],"amount":[54],"can":[58],"be":[59],"controlled":[60],"by":[61,79],"selecting":[62],"appropriate":[63,80],"characteristic":[64],"polynomials":[65,77],"and":[66,106,116],"reordering":[67],"LFSR":[69,81],"cells.":[70],"We":[71],"identify":[72],"class":[74],"such":[76],"which,":[78],"cell":[82],"ordering,":[83],"guarantees":[84],"large":[87],"ratio":[88],"cannot":[92],"occur.":[93],"Experimental":[94],"results":[95],"significant":[97],"enhancements":[98],"on":[99],"fault":[101,118],"coverage":[102],"testing":[105],"support":[107],"theoretical":[109],"relation":[110],"between":[111],"minimization":[112],"effective":[117],"coverage.<":[119],"<ETX":[120],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[121],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">&gt;</ETX>":[122]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
