{"id":"https://openalex.org/W1561654287","doi":"https://doi.org/10.1109/i2mtc.2015.7151482","title":"Designing elementary-tree space compressors using AND/NAND and XOR/XNOR combinations","display_name":"Designing elementary-tree space compressors using AND/NAND and XOR/XNOR combinations","publication_year":2015,"publication_date":"2015-05-01","ids":{"openalex":"https://openalex.org/W1561654287","doi":"https://doi.org/10.1109/i2mtc.2015.7151482","mag":"1561654287"},"language":"en","primary_location":{"id":"doi:10.1109/i2mtc.2015.7151482","is_oa":false,"landing_page_url":"https://doi.org/10.1109/i2mtc.2015.7151482","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020842134","display_name":"Nicholas A. Malan","orcid":null},"institutions":[{"id":"https://openalex.org/I149292303","display_name":"Troy University","ror":"https://ror.org/029jj9438","country_code":"US","type":"education","lineage":["https://openalex.org/I149292303"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Nicholas A. Malan","raw_affiliation_strings":["Department of Computer Science, Troy University, Montgomery, AL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Troy University, Montgomery, AL, USA","institution_ids":["https://openalex.org/I149292303"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103350095","display_name":"Sunil R. Das","orcid":null},"institutions":[{"id":"https://openalex.org/I149292303","display_name":"Troy University","ror":"https://ror.org/029jj9438","country_code":"US","type":"education","lineage":["https://openalex.org/I149292303"]},{"id":"https://openalex.org/I153718931","display_name":"University of Ottawa","ror":"https://ror.org/03c4mmv16","country_code":"CA","type":"education","lineage":["https://openalex.org/I153718931"]}],"countries":["CA","US"],"is_corresponding":false,"raw_author_name":"Sunil R. Das","raw_affiliation_strings":["Department of Computer Science, Troy University, Montgomery, AL, USA","Faculty of Engineering, University of Ottawa, Ottawa, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Troy University, Montgomery, AL, USA","institution_ids":["https://openalex.org/I149292303"]},{"raw_affiliation_string":"Faculty of Engineering, University of Ottawa, Ottawa, ON, Canada","institution_ids":["https://openalex.org/I153718931"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109483458","display_name":"Satyendra N. Biswas","orcid":null},"institutions":[{"id":"https://openalex.org/I135564639","display_name":"Ahsanullah University of Science and Technology","ror":"https://ror.org/04wfbp123","country_code":"BD","type":"education","lineage":["https://openalex.org/I135564639"]}],"countries":["BD"],"is_corresponding":false,"raw_author_name":"Satyendra N. Biswas","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Ahsanullah University of Science and Technology, Dhaka, Bangladesh"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Ahsanullah University of Science and Technology, Dhaka, Bangladesh","institution_ids":["https://openalex.org/I135564639"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008303398","display_name":"Mansour H. Assaf","orcid":"https://orcid.org/0000-0003-3052-9469"},"institutions":[{"id":"https://openalex.org/I44666525","display_name":"University of the South Pacific","ror":"https://ror.org/008stv805","country_code":"FJ","type":"education","lineage":["https://openalex.org/I44666525"]}],"countries":["FJ"],"is_corresponding":false,"raw_author_name":"Mansour H. Assaf","raw_affiliation_strings":["Department of Electrical armrnd Electronic Engineering, University of the South Pacific (USP), Suva, Fiji"],"affiliations":[{"raw_affiliation_string":"Department of Electrical armrnd Electronic Engineering, University of the South Pacific (USP), Suva, Fiji","institution_ids":["https://openalex.org/I44666525"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004353209","display_name":"Scott Morton","orcid":null},"institutions":[{"id":"https://openalex.org/I149292303","display_name":"Troy University","ror":"https://ror.org/029jj9438","country_code":"US","type":"education","lineage":["https://openalex.org/I149292303"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Scott Morton","raw_affiliation_strings":["Department of Computer Science, Troy University, Montgomery, AL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Troy University, Montgomery, AL, USA","institution_ids":["https://openalex.org/I149292303"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023904661","display_name":"Emil M. Petriu","orcid":"https://orcid.org/0000-0002-0274-1035"},"institutions":[{"id":"https://openalex.org/I9374425","display_name":"Ottawa University","ror":"https://ror.org/04jscf286","country_code":"US","type":"education","lineage":["https://openalex.org/I9374425"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Emil M. Petriu","raw_affiliation_strings":["University of Ottawa, Ottawa, ON, CA"],"affiliations":[{"raw_affiliation_string":"University of Ottawa, Ottawa, ON, CA","institution_ids":["https://openalex.org/I9374425"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109331727","display_name":"Voicu Groza","orcid":null},"institutions":[{"id":"https://openalex.org/I153718931","display_name":"University of Ottawa","ror":"https://ror.org/03c4mmv16","country_code":"CA","type":"education","lineage":["https://openalex.org/I153718931"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Voicu Groza","raw_affiliation_strings":["Faculty of Engineering, University of Ottawa, Ottawa, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Faculty of Engineering, University of Ottawa, Ottawa, ON, Canada","institution_ids":["https://openalex.org/I153718931"]}]}],"institutions":[],"countries_distinct_count":4,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5020842134"],"corresponding_institution_ids":["https://openalex.org/I149292303"],"apc_list":null,"apc_paid":null,"fwci":0.323,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.56483734,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"3","issue":null,"first_page":"1408","last_page":"1413"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.590471625328064},{"id":"https://openalex.org/keywords/xnor-gate","display_name":"XNOR gate","score":0.5620908141136169},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.5227630138397217},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.5212733745574951},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.4742533266544342},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.44740772247314453},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.4373348653316498},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38746803998947144},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.38527777791023254},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3609684705734253},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35305410623550415},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32705220580101013},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3264838457107544},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2711184620857239},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10420337319374084},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09583047032356262}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.590471625328064},{"id":"https://openalex.org/C57684291","wikidata":"https://www.wikidata.org/wiki/Q1336142","display_name":"XNOR gate","level":4,"score":0.5620908141136169},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.5227630138397217},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.5212733745574951},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.4742533266544342},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.44740772247314453},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.4373348653316498},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38746803998947144},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.38527777791023254},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3609684705734253},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35305410623550415},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32705220580101013},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3264838457107544},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2711184620857239},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10420337319374084},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09583047032356262},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/i2mtc.2015.7151482","is_oa":false,"landing_page_url":"https://doi.org/10.1109/i2mtc.2015.7151482","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5299999713897705}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1950209922","https://openalex.org/W1964801859","https://openalex.org/W1990354543","https://openalex.org/W2011039300","https://openalex.org/W2057022771","https://openalex.org/W2067328529","https://openalex.org/W2109678242","https://openalex.org/W2120612135","https://openalex.org/W2130022711","https://openalex.org/W2135321691","https://openalex.org/W2149107969","https://openalex.org/W2158732594","https://openalex.org/W2161191982","https://openalex.org/W2485930581","https://openalex.org/W2587271961","https://openalex.org/W2988643289","https://openalex.org/W6641533209"],"related_works":["https://openalex.org/W2809950606","https://openalex.org/W4382698721","https://openalex.org/W4206064298","https://openalex.org/W4205450031","https://openalex.org/W2033342070","https://openalex.org/W2792072658","https://openalex.org/W2913283152","https://openalex.org/W2951266691","https://openalex.org/W3046969929","https://openalex.org/W2616524835"],"abstract_inverted_index":{"Implementing":[0],"aliasing-free":[1,45],"(zero-aliasing)":[2],"space":[3,47,139],"compressors":[4,140],"for":[5,55,141,186],"built-in":[6],"self-testing":[7],"of":[8,17,23,68,76,84,88,98,136,138,170,176],"very":[9],"large":[10],"scale":[11],"integration":[12],"circuits":[13,158],"and":[14,39,102,124,147,152,165,182],"systems":[15],"is":[16,129],"great":[18],"significance,":[19],"especially":[20],"in":[21,28,73,131,196],"view":[22],"the":[24,74,89,93,96,132,142,168,171,174],"technological":[25],"paradigm":[26],"shift":[27],"recent":[29],"years":[30],"from":[31,62,173],"system-on-board":[32],"to":[33,43,121],"system-on-chip":[34],"design.":[35],"This":[36],"paper":[37,94,133],"investigates":[38],"provides":[40],"new":[41],"approach":[42],"realizing":[44],"elementary-tree":[46],"compaction":[48],"hardware":[49],"targeting":[50],"specifically":[51],"embedded":[52],"cores-based":[53],"system-on-chips":[54],"single":[56,187],"stuck-line":[57,188],"faults,":[58,189],"extending":[59],"well-known":[60],"concept":[61],"conventional":[63],"switching":[64],"theory,":[65],"viz.":[66],"that":[67],"compatibility":[69,101,106],"relation":[70],"as":[71],"used":[72],"minimization":[75],"incompletely":[77],"specified":[78],"sequential":[79,156],"machines.":[80],"For":[81],"a":[82,193],"pair":[83,113],"response":[85,111],"data":[86],"outputs":[87],"circuit":[90],"under":[91],"test,":[92],"introduces":[95],"notion":[97],"fault":[99,104,116,160,184],"detection":[100,105,117],"conditional":[103],"(conditional":[107],"upon":[108],"some":[109],"other":[110],"output":[112],"being":[114],"simultaneously":[115],"compatible)":[118],"with":[119,134],"respect":[120],"two-input":[122],"AND/NAND":[123],"XOR/XNOR":[125],"logic.":[126],"The":[127],"process":[128],"illustrated":[130],"details":[135],"synthesis":[137],"International":[143],"Symposium":[144],"on":[145],"Circuits":[146],"Systems":[148],"(ISCAS)":[149],"85":[150],"combinational":[151],"ISCAS":[153],"89":[154],"full-scan":[155],"benchmark":[157],"using":[159],"simulation":[161],"programs":[162],"ATALANTA,":[163],"FSIM":[164],"HOPE,":[166],"exemplifying":[167],"relevance":[169],"technique":[172],"standpoint":[175],"simplicity,":[177],"resultant":[178],"low":[179],"area":[180],"overhead":[181],"full":[183],"coverage":[185],"making":[190],"it":[191],"thus":[192],"logical":[194],"choice":[195],"commercial":[197],"design":[198],"environments.":[199]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}