{"id":"https://openalex.org/W2165982757","doi":"https://doi.org/10.1109/i2mtc.2013.6555673","title":"Data compression using mixed cascade of nonlinear logic","display_name":"Data compression using mixed cascade of nonlinear logic","publication_year":2013,"publication_date":"2013-05-01","ids":{"openalex":"https://openalex.org/W2165982757","doi":"https://doi.org/10.1109/i2mtc.2013.6555673","mag":"2165982757"},"language":"en","primary_location":{"id":"doi:10.1109/i2mtc.2013.6555673","is_oa":false,"landing_page_url":"https://doi.org/10.1109/i2mtc.2013.6555673","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103350095","display_name":"Sunil R. Das","orcid":null},"institutions":[{"id":"https://openalex.org/I149292303","display_name":"Troy University","ror":"https://ror.org/029jj9438","country_code":"US","type":"education","lineage":["https://openalex.org/I149292303"]},{"id":"https://openalex.org/I153718931","display_name":"University of Ottawa","ror":"https://ror.org/03c4mmv16","country_code":"CA","type":"education","lineage":["https://openalex.org/I153718931"]}],"countries":["CA","US"],"is_corresponding":true,"raw_author_name":"Sunil R. Das","raw_affiliation_strings":["Department of Computer Science, College of Arts and Sciences, Troy University, Montgomery, AL, USA","School of Information Technology and Engineering, Faculty of Engineering, University of Ottawa, Ottawa, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, College of Arts and Sciences, Troy University, Montgomery, AL, USA","institution_ids":["https://openalex.org/I149292303"]},{"raw_affiliation_string":"School of Information Technology and Engineering, Faculty of Engineering, University of Ottawa, Ottawa, ONT, Canada","institution_ids":["https://openalex.org/I153718931"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039521074","display_name":"Danny L. Shaw","orcid":null},"institutions":[{"id":"https://openalex.org/I149292303","display_name":"Troy University","ror":"https://ror.org/029jj9438","country_code":"US","type":"education","lineage":["https://openalex.org/I149292303"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Danny L. Shaw","raw_affiliation_strings":["Department of Computer Science, College of Arts and Sciences, Troy University, Montgomery, AL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, College of Arts and Sciences, Troy University, Montgomery, AL, USA","institution_ids":["https://openalex.org/I149292303"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109483458","display_name":"Satyendra N. Biswas","orcid":null},"institutions":[{"id":"https://openalex.org/I31669788","display_name":"Independent University","ror":"https://ror.org/05qbbf772","country_code":"BD","type":"education","lineage":["https://openalex.org/I31669788"]}],"countries":["BD"],"is_corresponding":false,"raw_author_name":"Satyendra N. Biswas","raw_affiliation_strings":["School of Engineering and Computer Science, Independent University, Dhaka, Bangladesh"],"affiliations":[{"raw_affiliation_string":"School of Engineering and Computer Science, Independent University, Dhaka, Bangladesh","institution_ids":["https://openalex.org/I31669788"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008303398","display_name":"Mansour H. Assaf","orcid":"https://orcid.org/0000-0003-3052-9469"},"institutions":[{"id":"https://openalex.org/I44666525","display_name":"University of the South Pacific","ror":"https://ror.org/008stv805","country_code":"FJ","type":"education","lineage":["https://openalex.org/I44666525"]}],"countries":["FJ"],"is_corresponding":false,"raw_author_name":"Mansour H. Assaf","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, University of South Pacific, Suva, Fiji"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, University of South Pacific, Suva, Fiji","institution_ids":["https://openalex.org/I44666525"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004353209","display_name":"Scott Morton","orcid":null},"institutions":[{"id":"https://openalex.org/I149292303","display_name":"Troy University","ror":"https://ror.org/029jj9438","country_code":"US","type":"education","lineage":["https://openalex.org/I149292303"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Scott Morton","raw_affiliation_strings":["Department of Computer Science, College of Arts and Sciences, Troy University, Montgomery, AL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, College of Arts and Sciences, Troy University, Montgomery, AL, USA","institution_ids":["https://openalex.org/I149292303"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058360739","display_name":"\u0130rem \u00d6zkarahan","orcid":null},"institutions":[{"id":"https://openalex.org/I149292303","display_name":"Troy University","ror":"https://ror.org/029jj9438","country_code":"US","type":"education","lineage":["https://openalex.org/I149292303"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Irem Ozkarahan","raw_affiliation_strings":["Department of Computer Science, College of Arts and Sciences, Troy University, Montgomery, AL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, College of Arts and Sciences, Troy University, Montgomery, AL, USA","institution_ids":["https://openalex.org/I149292303"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023904661","display_name":"Emil M. Petriu","orcid":"https://orcid.org/0000-0002-0274-1035"},"institutions":[{"id":"https://openalex.org/I153718931","display_name":"University of Ottawa","ror":"https://ror.org/03c4mmv16","country_code":"CA","type":"education","lineage":["https://openalex.org/I153718931"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Emil M. Petriu","raw_affiliation_strings":["School of Information Technology and Engineering, Faculty of Engineering, University of Ottawa, Ottawa, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"School of Information Technology and Engineering, Faculty of Engineering, University of Ottawa, Ottawa, ONT, Canada","institution_ids":["https://openalex.org/I153718931"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109331727","display_name":"Voicu Groza","orcid":null},"institutions":[{"id":"https://openalex.org/I153718931","display_name":"University of Ottawa","ror":"https://ror.org/03c4mmv16","country_code":"CA","type":"education","lineage":["https://openalex.org/I153718931"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Voicu Groza","raw_affiliation_strings":["School of Information Technology and Engineering, Faculty of Engineering, University of Ottawa, Ottawa, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"School of Information Technology and Engineering, Faculty of Engineering, University of Ottawa, Ottawa, ONT, Canada","institution_ids":["https://openalex.org/I153718931"]}]}],"institutions":[],"countries_distinct_count":4,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5103350095"],"corresponding_institution_ids":["https://openalex.org/I149292303","https://openalex.org/I153718931"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.17266316,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1544","last_page":"1549"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.6334332823753357},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6298730969429016},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.5640960931777954},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5111075043678284},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4888445734977722},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.4861176013946533},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.483367383480072},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4420834183692932},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.40264004468917847},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3620777130126953},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3580538034439087},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17743858695030212},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09439438581466675},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08996883034706116}],"concepts":[{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.6334332823753357},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6298730969429016},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.5640960931777954},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5111075043678284},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4888445734977722},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.4861176013946533},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.483367383480072},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4420834183692932},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.40264004468917847},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3620777130126953},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3580538034439087},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17743858695030212},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09439438581466675},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08996883034706116},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/i2mtc.2013.6555673","is_oa":false,"landing_page_url":"https://doi.org/10.1109/i2mtc.2013.6555673","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1502477161","https://openalex.org/W1950209922","https://openalex.org/W1984082405","https://openalex.org/W1997593029","https://openalex.org/W2038380992","https://openalex.org/W2098516903","https://openalex.org/W2130022711","https://openalex.org/W2161191982","https://openalex.org/W2587271961","https://openalex.org/W2988216865","https://openalex.org/W2988643289"],"related_works":["https://openalex.org/W2120257283","https://openalex.org/W2117563988","https://openalex.org/W2161696808","https://openalex.org/W4240466429","https://openalex.org/W2069145203","https://openalex.org/W1702800398","https://openalex.org/W2085176210","https://openalex.org/W2106889348","https://openalex.org/W2083793411","https://openalex.org/W2135500595"],"abstract_inverted_index":{"The":[0,103],"subject":[1],"paper":[2],"presents":[3],"new":[4],"approach":[5],"to":[6,97],"response":[7,58,87],"data":[8,59,88],"compaction":[9],"of":[10,21,35,41,49,57,61,72,86,111,142],"multi-output":[11],"digital":[12],"circuits":[13,132,157],"using":[14,133,158],"two-input":[15,98],"nonlinear":[16],"logic":[17],"with":[18,95,107],"the":[19,47,62,67,70,108,115],"objective":[20],"designing":[22],"zeroaliasing":[23],"(aliasing-free)":[24],"space":[25,112,143],"compression":[26],"hardware":[27],"for":[28,114],"single":[29],"stuck-line":[30],"faults,":[31],"extending":[32],"well-known":[33],"concept":[34],"conventional":[36],"switching":[37],"theory,":[38],"viz.":[39],"that":[40],"compatibility":[42,75,80],"relation":[43],"as":[44],"used":[45],"in":[46],"minimization":[48],"incompletely":[50],"specified":[51],"sequential":[52,130,155],"machines.":[53],"For":[54],"a":[55],"pair":[56,85],"outputs":[60,89],"circuit":[63],"under":[64],"test":[65],"(CUT),":[66],"method":[68],"introduces":[69],"notion":[71],"fault":[73,78,92],"detection":[74,79,93],"and":[76,120,126,138],"conditional":[77],"(conditional":[81],"upon":[82],"some":[83,146],"other":[84],"being":[90],"simultaneously":[91],"compatible)":[94],"respect":[96],"AND/NAND":[99],"and/or":[100],"OR/NOR":[101],"logic.":[102],"process":[104],"is":[105],"illustrated":[106],"design":[109],"details":[110],"compressors":[113],"International":[116],"Symposium":[117],"on":[118,149,151],"Circuits":[119],"Systems":[121],"or":[122],"ISCAS":[123,127,152],"85":[124],"combinational":[125],"89":[128,153],"full-scan":[129,154],"benchmark":[131,156],"simulation":[134,150],"programs":[135],"ATALANTA,":[136],"FSIM":[137],"COMPACTEST,":[139],"though,":[140],"because":[141],"constraints,":[144],"only":[145],"partial":[147],"results":[148],"ATALANTA":[159],"are":[160],"provided":[161],"here.":[162]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}