{"id":"https://openalex.org/W2142824005","doi":"https://doi.org/10.1109/fpt.2004.1393301","title":"A new architecture of field programmable analog arrays for reconfigurable instantiation of continuous-time filters","display_name":"A new architecture of field programmable analog arrays for reconfigurable instantiation of continuous-time filters","publication_year":2005,"publication_date":"2005-03-21","ids":{"openalex":"https://openalex.org/W2142824005","doi":"https://doi.org/10.1109/fpt.2004.1393301","mag":"2142824005"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2004.1393301","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2004.1393301","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067122803","display_name":"Joachim Becker","orcid":"https://orcid.org/0000-0002-2125-7812"},"institutions":[{"id":"https://openalex.org/I161046081","display_name":"University of Freiburg","ror":"https://ror.org/0245cg223","country_code":"DE","type":"education","lineage":["https://openalex.org/I161046081"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"J. Becker","raw_affiliation_strings":["IMTEK, Albert Ludwig University, Freiburg im Breisgau, Germany","IMTEK, Albert-Ludwigs-Univ., Freiburg, Germany"],"affiliations":[{"raw_affiliation_string":"IMTEK, Albert Ludwig University, Freiburg im Breisgau, Germany","institution_ids":["https://openalex.org/I161046081"]},{"raw_affiliation_string":"IMTEK, Albert-Ludwigs-Univ., Freiburg, Germany","institution_ids":["https://openalex.org/I161046081"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052080512","display_name":"Yiannos Manoli","orcid":"https://orcid.org/0000-0003-2805-0539"},"institutions":[{"id":"https://openalex.org/I161046081","display_name":"University of Freiburg","ror":"https://ror.org/0245cg223","country_code":"DE","type":"education","lineage":["https://openalex.org/I161046081"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Y. Manoli","raw_affiliation_strings":["IMTEK, Albert Ludwig University, Freiburg im Breisgau, Germany","IMTEK, Albert-Ludwigs-Univ., Freiburg, Germany"],"affiliations":[{"raw_affiliation_string":"IMTEK, Albert Ludwig University, Freiburg im Breisgau, Germany","institution_ids":["https://openalex.org/I161046081"]},{"raw_affiliation_string":"IMTEK, Albert-Ludwigs-Univ., Freiburg, Germany","institution_ids":["https://openalex.org/I161046081"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5067122803"],"corresponding_institution_ids":["https://openalex.org/I161046081"],"apc_list":null,"apc_paid":null,"fwci":1.7461,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.8438005,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"367","last_page":"370"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-analog-array","display_name":"Field-programmable analog array","score":0.8946607708930969},{"id":"https://openalex.org/keywords/digital-biquad-filter","display_name":"Digital biquad filter","score":0.7399371862411499},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.6411667466163635},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.5869289040565491},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5866507291793823},{"id":"https://openalex.org/keywords/analog-signal-processing","display_name":"Analog signal processing","score":0.580599844455719},{"id":"https://openalex.org/keywords/analogue-filter","display_name":"Analogue filter","score":0.571526288986206},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5120759606361389},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.5019679069519043},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.48935431241989136},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.46922028064727783},{"id":"https://openalex.org/keywords/analog-image-processing","display_name":"Analog image processing","score":0.44809889793395996},{"id":"https://openalex.org/keywords/field","display_name":"Field (mathematics)","score":0.41280290484428406},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4047248065471649},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.38441962003707886},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33037668466567993},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.29022711515426636},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"Low-pass filter","score":0.2715038061141968},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24106237292289734},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2059919238090515},{"id":"https://openalex.org/keywords/analog-device","display_name":"Analog device","score":0.19441649317741394},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.1329449713230133},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11612337827682495},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10459202527999878}],"concepts":[{"id":"https://openalex.org/C149128552","wikidata":"https://www.wikidata.org/wiki/Q380201","display_name":"Field-programmable analog array","level":5,"score":0.8946607708930969},{"id":"https://openalex.org/C14455310","wikidata":"https://www.wikidata.org/wiki/Q5276043","display_name":"Digital biquad filter","level":4,"score":0.7399371862411499},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.6411667466163635},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.5869289040565491},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5866507291793823},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.580599844455719},{"id":"https://openalex.org/C176046018","wikidata":"https://www.wikidata.org/wiki/Q359205","display_name":"Analogue filter","level":4,"score":0.571526288986206},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5120759606361389},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.5019679069519043},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.48935431241989136},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.46922028064727783},{"id":"https://openalex.org/C28525508","wikidata":"https://www.wikidata.org/wiki/Q4751054","display_name":"Analog image processing","level":5,"score":0.44809889793395996},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.41280290484428406},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4047248065471649},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.38441962003707886},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33037668466567993},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.29022711515426636},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.2715038061141968},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24106237292289734},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2059919238090515},{"id":"https://openalex.org/C90711627","wikidata":"https://www.wikidata.org/wiki/Q3742408","display_name":"Analog device","level":4,"score":0.19441649317741394},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.1329449713230133},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11612337827682495},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10459202527999878},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.0},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.0},{"id":"https://openalex.org/C193828747","wikidata":"https://www.wikidata.org/wiki/Q864118","display_name":"Binary image","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpt.2004.1393301","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2004.1393301","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W29830616","https://openalex.org/W1531006347","https://openalex.org/W2094356006","https://openalex.org/W2109573594","https://openalex.org/W2121226030"],"related_works":["https://openalex.org/W2061402905","https://openalex.org/W2005415695","https://openalex.org/W2254292019","https://openalex.org/W1489445348","https://openalex.org/W4233024123","https://openalex.org/W2111086519","https://openalex.org/W4309100299","https://openalex.org/W3080406202","https://openalex.org/W2042010776","https://openalex.org/W2142824005"],"abstract_inverted_index":{"A":[0],"new":[1],"methodology":[2],"of":[3,21,30,47,58,75,81,100,104,112],"field":[4],"programmable":[5],"analog":[6,34,60,84],"arrays":[7],"(FPAAs)":[8],"is":[9,12,45,88,119],"presented,":[10],"which":[11,52],"particularly":[13],"designed":[14],"as":[15,92],"hardware":[16,93],"platform":[17,94],"for":[18,67,95],"the":[19,59,64,76,82,101],"instantiation":[20,111],"continuous-time":[22,69],"(CT)":[23],"adaptable":[24],"filters.":[25,70],"The":[26,86],"array":[27,77],"topology":[28],"consists":[29,99],"17":[31],"digitally":[32],"configurable":[33],"blocks":[35,66],"(CABs)":[36],"connected":[37],"through":[38],"a":[39,113],"hexagonal":[40],"interconnect":[41],"network.":[42],"Each":[43],"CAB":[44],"built":[46],"tunable":[48],"G/sub":[49,105],"m/-C":[50,106],"integrators,":[51],"provide":[53,73],"both":[54],"routing":[55],"and":[56,62,90,108],"shaping":[57],"signal":[61],"are":[63],"building":[65],"high-speed":[68],"Intelligent":[71],"IO-buffers":[72],"reconfiguration":[74],"with":[78],"minimal":[79],"disturbance":[80],"continuous":[83],"signal.":[85],"architecture":[87],"introduced":[89],"reviewed":[91],"any":[96],"circuit":[97],"that":[98],"given":[102],"number":[103],"cells":[107],"an":[109],"exemplary":[110],"4th":[114],"order":[115],"biquad":[116],"Butterworth":[117],"filter":[118],"shown.":[120]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
